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	<title><![CDATA[asic and chip Resources | BNET]]></title>
	<link><![CDATA[http://resources.bnet.com/topic/asic+and+chip.html]]></link>
	<description><![CDATA[White papers, case studies, business articles, and blog posts relating to asic and chip]]></description>
	<s:counts start="0" returned="17" found="17" />
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		<title><![CDATA[Kawasaki Micro Improves Timing, Area, Power of ASICs with Cadence Encounter Synthesis; Encounter RTL Compiler Enhanced over 30 Production Tapeouts of ASIC Chips at KME]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2005_Nov_9/ai_n15785847]]></link>
		<description><![CDATA[SAN JOSE, Calif. -- Kawasaki Microelectronics, Inc. of Japan KME and Cadence Design Systems, Inc. (NASDAQ:CDNS) today announced that KME has completed more than 30 production tapeouts of ASIC chips with CadenceR EncounterR RTL Compiler global synthesis, a key technology of the Encounter digital IC design platform. On average, Encounter...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 09 Nov 2005 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/cadence+design+systems+inc..html"><![CDATA[Cadence Design Systems Inc.]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">CDNS</category>
		<category domain="tickers">CDNS</category>
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		<title><![CDATA[Single-chip solution for passive keyless entry: combines analog front end, microcontroller in one package.(ELECTRONICS)]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_hb078/is_200509/ai_n18984870]]></link>
		<description><![CDATA[Engineers designing radio frequency systems for passive keyless  entry and tire pressure monitoring may now be able to swap two chips for  one, thanks to a new device that combines a microcontroller with a  three-channel analog transponder.       Know   ...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 26 Sep 2005 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
		<category domain="http://resources.bnet.com/topic/electronics.html"><![CDATA[electronics]]></category>
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	<item>
		<title><![CDATA[evolution of build-up package technology and its design challenges, The]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_qa3751/is_200507/ai_n15615446]]></link>
		<description><![CDATA[This paper reviews sequential build-up SBU laminate substrate development from its beginning in 1988. It reports on developments in this technology for IBM applications since its adoption in 2000. These laminated substrates are nonuniform structures composed of three elements: a core, build-up layers, and finishing layers. Each element has evolved...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Fri, 01 Jul 2005 23:59:59 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/board.html"><![CDATA[board]]></category>
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		<category domain="http://resources.bnet.com/topic/hardware.html"><![CDATA[HARDWARE]]></category>
		<category domain="http://resources.bnet.com/topic/ibm+corp..html"><![CDATA[IBM Corp.]]></category>
		<category domain="http://resources.bnet.com/topic/ieee.html"><![CDATA[IEEE]]></category>
		<category domain="http://resources.bnet.com/topic/microprocessor.html"><![CDATA[microprocessor]]></category>
		<category domain="http://resources.bnet.com/topic/networking.html"><![CDATA[NETWORKING]]></category>
		<category domain="http://resources.bnet.com/topic/performance.html"><![CDATA[performance]]></category>
		<category domain="http://resources.bnet.com/topic/semiconductors.html"><![CDATA[Semiconductors]]></category>
		<category domain="http://resources.bnet.com/topic/substrate.html"><![CDATA[substrate]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">IBM</category>
		<category domain="tickers">IBM</category>
	</item>
	<item>
		<title><![CDATA[Qualified ASIC packaging capability.(Integrated Circuits & Semiconductors)]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_hb4822/is_200505/ai_n17590891]]></link>
		<description><![CDATA[Aeroflex has announced qualification of its RadHard ASIC packaging  capability for desirable SSO simultaneous switching output response.  An external chip capacitor attachment is available for UT0.05 [micro]n  RadHardASICs and FPGA-to-ASIC conversions  Aeroflex has announced qualification of its RadHard ASIC packaging  capability for desirable SSO (simultaneous...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Sun, 15 May 2005 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/aeroflex+inc..html"><![CDATA[Aeroflex Inc.]]></category>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/capacitor.html"><![CDATA[capacitor]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
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		<title><![CDATA[Nexense and Fujitsu Add Real-Time Monitoring of Vital Signs to Mobile Devices; Companies to Manufacture New ASIC Chip Set for Non-intrusive Vital Signs Monitoring]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2004_Oct_5/ai_n6222768]]></link>
		<description><![CDATA[NEW YORK -- Nexense, an emerging sensing technology and research and development company, has chosen Fujitsu to develop and manufacture a new ASIC chip set for non-intrusive monitoring and tracking of vital signs via mobile phones.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 05 Oct 2004 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">6702</category>
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		<title><![CDATA[New Lucent chip doubles voice, data capacity. (News).]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_hb4962/is_200212/ai_n18159232]]></link>
		<description><![CDATA[MURRAY HILL, N.J.--Lucent Technologies Inc. released a new chip the  company said will work as a smart antenna for CDMA networks, doubling  the networks' capacity for voice and data traffic.       The new application-specific integrated circuit will w    MURRAY HILL,...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 23 Dec 2002 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/alcatel-lucent.html"><![CDATA[Alcatel-Lucent]]></category>
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		<title><![CDATA[IBM, Xilinx Shake Up Art of Chip Design With New Custom Product; Embedding Xilinx FPGA Technology Into IBM ASICs to Offer Designers Unprecedented Flexibility]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2002_June_24/ai_87694341]]></link>
		<description><![CDATA[Business/High Tech Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 24 Jun 2002 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<title><![CDATA[New Strategic Relationships Enhance Synplicity's ASIC Synthesis Offering; Fujitsu and Chip Express Support the Synplify ASIC Product]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2002_March_4/ai_83525778]]></link>
		<description><![CDATA[Business/Technology Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 04 Mar 2002 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
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		<title><![CDATA[VIPswitch Partners With Xilinx to Move Beyond Asics for Optical Switch/Routing; Remotely Programmable Chips are a Perfect Fit for New Line of Optical Terabit Routers]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2001_March_28/ai_72392974]]></link>
		<description><![CDATA[Business & High Tech Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 28 Mar 2001 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
		<category domain="http://resources.bnet.com/topic/router.html"><![CDATA[router]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">XLNX</category>
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	<item>
		<title><![CDATA[IBM and LSI Logic Announce Technology Licensing Agreement; ASIC Leaders to Broaden Use of ZSP DSP Technology in Custom Chips]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2001_Jan_22/ai_69367139]]></link>
		<description><![CDATA[Business Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 22 Jan 2001 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
		<category domain="http://resources.bnet.com/topic/ibm+corp..html"><![CDATA[IBM Corp.]]></category>
		<category domain="http://resources.bnet.com/topic/lsi+logic+corp..html"><![CDATA[LSI Logic Corp.]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">IBM</category>
		<category domain="tickers">IBM</category>
	</item>
	<item>
		<title><![CDATA[Wi-LAN Cuts W-OFDM Engine Costs by More Than 70 Percent With First ASIC Chip of its Kind]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2000_August_2/ai_63814635]]></link>
		<description><![CDATA[Business Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 02 Aug 2000 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[Tenor Networks Announces Technology Agreement With IBM; IBM to Manufacture ASIC Chip Set and Supply PowerPC Processors for Tenor's Optical Service Switch]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2000_May_23/ai_62257885]]></link>
		<description><![CDATA[Business/Technology Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 23 May 2000 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/agreement.html"><![CDATA[agreement]]></category>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">IBM</category>
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		<title><![CDATA[IMS and Schlumberger Team Up to Deliver Virtual Test Solution for Sun Microsystems' Next-Generation SPARC and ASIC Chips]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_1998_Oct_12/ai_53075262]]></link>
		<description><![CDATA[BEAVERTON, Ore.--BUSINESS WIRE--Oct. 12, 1998--]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 12 Oct 1998 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
		<category domain="http://resources.bnet.com/topic/ibm+ims.html"><![CDATA[IBM IMS]]></category>
		<category domain="http://resources.bnet.com/topic/schlumberger+ltd..html"><![CDATA[Schlumberger Ltd.]]></category>
		<category domain="http://resources.bnet.com/topic/sun+microsystems+inc..html"><![CDATA[Sun Microsystems Inc.]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">SLB</category>
		<category domain="http://rss.financialcontent.com/stocksymbol">JAVA</category>
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	<item>
		<title><![CDATA[Aware Inc. Announces Availability Of ASIC Cores For DSL Chipsets; Aware's ASIC Cores Will Accelerate DSL Development for Chip Makers]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_1998_Oct_6/ai_53059689]]></link>
		<description><![CDATA[BEDFORD, Mass.--BUSINESS WIRE--Oct. 6, 1998-- Aware Inc. (NASDAQ:AWRE), a worldwide leader in DSL digital subscriber line technology for high-speed Internet access, today announced the availability of ASIC application specific integrated circuit cores for silicon providers and equipment manufacturers who wish to rapidly integrate full-rate ADSL or DSL-Lite technology into their...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 06 Oct 1998 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">AWRE</category>
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		<title><![CDATA[Sun Standardizes on Schlumberger Leading-Edge Test Systems for Next Generation SPARC and ASIC Chips]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_1998_Jan_20/ai_20153742]]></link>
		<description><![CDATA[SAN JOSE, Calif.--BUSINESS WIRE--Jan. 20, 1998--]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 20 Jan 1998 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">JAVA</category>
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		<title><![CDATA[Whitetree Signs Agreement With Texas Instruments To Produce Next Generation Network Switching Chip; Whitetree's New ASIC To Provide Core For Next Generation Of Ethernet/ATM Switching Products]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_1996_Dec_16/ai_18953302]]></link>
		<description><![CDATA[MOUNTAIN VIEW, Calif.--BUSINESS WIRE--Dec. 16, 1996--Whitetree Inc., (formerly Whitetree Network Technologies Inc.), the pioneer of Ethernet and Asynchronous Transfer Mode ATM adaptable switching technology, today announced it has signed an agreement with Texas Instruments to produce a new generation of Ethernet and ATM network switching silicon.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 16 Dec 1996 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/agreement.html"><![CDATA[agreement]]></category>
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		<title><![CDATA[Sun woos NEC for new MPU - Sun Microsystems' negotiating with NEC's ASIC manufacturing division to manufacture next-generation, mid-range Sun UltraSparc chip - Company Business and Marketing]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EKF/is_n2099_v42/ai_17817155]]></link>
		<description><![CDATA[Mountain View, Calif.--Sun Microsystems is currently negotiating with NEC's ASIC manufacturing division in Japan to do foundry work for Sun on a next-generation, mid-range Sun UltraSparc chip that is currently under development.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 15 Jan 1996 00:00:00 -0800</pubDate>
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