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3 Resources for

asic and electronic design automation

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ASIC
Australian Securities and Investments Commission
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Custom ASIC platform. (Electronic Design Automation).(Agere Systems AGR90)(Brief Article)
* Targets communications applications * Includes various types of standard protocols, SERDES subcircuits, encoding schemes, DSPs, I/O cells, microprocessors, ... * Targets communications applications * Includes various types of standard protocols, SERDES subcircuits, ...
Tags: Agere Systems Inc., ASIC, electronic design automation
Research articles 2002-09-05
Electronic Design Automation.(Technology Information)
Verilog simulator * Stand-alone direct-compile simulator complies with IEEE-1364-95 standard * Provides HDL, state machine, and block diagram/schematic editors * Includes a project manager, automatic testbench generator, waveform v ...
Tags: ASIC, CAD, Cadence Design Systems Inc., electronic design automation, environment, Mentor Graphics Corp., processor, tool, WWW
Research articles 2000-10-26
ASIC design/verification environment. (Electronic Design Automation).(Aldec Riviera-Elite)(Brief Article)(Product Announcement)
* Teams Summit Design's Visual Elite design environment with Aldec's Riviera simulator to provide a complete HDL design-entry and -verification environment * Supports both graphical and textual VHDL, Verilog, C/ C++, ... * Teams Summit Design's Visual Elite...
Tags: ASIC, electronic design automation, environment
Research articles 2002-08-22

Additional Resources

Mentor, Siemens in EDA accord: impact on Cadence? - Mentor Graphics Corp. will provide Siemens Nixdorf Informationssysteme AG with electronic design automation tools in its Falcon framework
MUNICH, Germany -- Mentor Graphics Corp., jumping to the challenge of a deal inked earlier this year by Siemens Nixdorf Informationssysteme AG and Cadence Design Systems Inc., has signed an agreement to provide SNI with a full range of electronic desing automation tools for system, ASIC and IC design, integrated...
Tags: Cadence Design Systems Inc., electronic design automation, Mentor Graphics Corp., Siemens AG
Research articles 1991-11-11
Mentor, VLSI ink 5-year ASIC design pact - Mentor Graphics and VLSI Technology will develop integrated, top-down ASIC designs
SAN JOSE, CALIF.--Mentor Graphics and VLSI Technology signed a five-year agreement to work closer together on integrated, top-down ASIC design offerings. The deal is another in a recent series of cooperative agreements between ASIC manufacturers and electronic design automation tool vendors--two parties that often had opposing interests a decade ago.
Tags: Mentor Graphics Corp., VLSI
Research articles 1994-09-26
Memec Joins LSI Logic RapidChip Partner Program; Leading Semiconductor Distributor Partners to Provide Best-in-Class Design Services for Customer Product Development
SAN DIEGO -- Memec, a leading global semiconductor distributor specializing in demand creation, today announced that it has joined the LSI Logic (NYSE:LSI) RapidChipR Partner Program. The program reduces time-to-revenue, design risks and system costs by providing platform ASIC designers with third-party development capabilities. These capabilities include intellectual property IP,...
Tags: design services, LSI Logic Corp., product development, semiconductor
Research articles 2004-11-09
COMPASS TO PROVIDE DATAPATH COMPILER AND LIBRARIES FOR NEC OpenCAD ASIC DESIGN SYSTEM; Agreement Marks the First Time NEC Secures Third-Party Expertise for Compiled Datapath
TOKYO--BUSINESS WIRE--Aug. 28, 1995--COMPASS Design Automation, Inc., a leader in electronic design automation EDA tools and libraries, today announced at the 1995 Electronic Design Automation Technofair/Asia South Pacific Design Automation Conference, a technology agreement with NEC Corporation, the world's largest ASIC vendor. Under the terms of the agreement, COMPASS...
Tags: agreement, electronic design automation, NEC Corp.
Research articles 1995-08-28
Tool set joins synthesis with simulation for reliable ASIC design. (application specific integrated circuit) (Mentor Graphics Corp.'s Top Down Design-Solver) (Product Announcement)
Right-first-time silicon, the Holy Grail of the EDA (electronic-design-automation) industry, is being sought and found on routine designs. But, below 1-[mu]m-feature size and above 60,000 gates or a 33-MHz clock rate, advanced ASIC designs tend to Right-first-time silicon, the Holy Grail of the...
Tags: ASIC, integrated circuit, Mentor Graphics Corp., tool
Research articles 1992-11-26
Escalade expands offering for ASIC designers; DesignBook now supports ASIC designers using Synopsys, Verilog HDL and UNIX
SUNNYVALE, Calif.--BUSINESS WIRE--June 6, 1995--Electronic Design Automation EDA supplier EscaladeTM Corporation, based here, today announced it has enhanced its DesignBookTM, High Level Design Automation HLDA software, by expanding its capabilities to support experienced HLDA users, most notably, Application Specific Integrated Circuit ASIC designers.
Tags: ASIC, Unix
Research articles 1995-06-06
COMPASS AND TSMC PARTNER FOR LIBRARY DEVELOPMENT; Leading Foundry and Leading Library Provider Team for Physical Library Development to Ensure Success for Submicron ASIC Customers
HSINCHU, Taiwan--BUSINESS WIRE--Aug. 28, 1995--COMPASS Design Automation, Inc., a leader in electronic design automation EDA tools and libraries for submicron design, today announced at the Electronic Design Automation and Test (EDA&T) Conference that it has joined with Taiwan Semiconductor Manufacturing Company, Ltd. TSMC in an agreement aimed at verifying TSMC's...
Tags: agreement, electronic design automation, Taiwan Semiconductor Manufacturing Co. Ltd., team
Research articles 1995-08-28
New EDA Company Stelar Tools Optimizes Design and Simulation Resources for Re-design of Large, Complex Electronic Products
Business Editors PORTLAND, Ore.--BUSINESS WIRE--May 24, 2004 Oregon Startup Secures Seed Funding from Local Investor Group Stelar Tools, Inc., a Portland, Oregon-based start-up, announced it has received seed funding to develop electronic design automation EDA products that optimize design and simulation resources for ASIC, SoC and FPGA...
Tags: Stelar Inc.
Research articles 2004-05-24
Exemplar Logic 3.1 Release of Galileo Enhances Support for AT&T ORCA, Xilinx and Other FPGA Devices
ALAMEDA, Calif.--BUSINESS WIRE--Sept. 25, 1995--Exemplar Logic, a supplier of High-Level Design HLD software tools for the Electronic Design Automation EDA market, today announced upgraded technology support for version 3.1 of its Galileo FPGA and ASIC design environment.
Tags: AT&T Corp., FPGA, Xilinx Inc.
Research articles 1995-09-25
Denali Software Introduces Direct RDRAM Verification Kit; Includes Simulation Models for Direct Rambus DRAM and Rambus ASIC Cell, Performance Modeler, Customized Debugger
PALO ALTO, Calif.--BUSINESS WIRE--Oct. 5, 1998-- Denali Software, based here, today announced immediate availability of a Direct RambusTM DRAM (Direct RDRAMTM) Verification Kit, including simulation models, performance modeling and debugger software to improve the verification process for Rambus DRAM-based memory controllers and systems. Denali Software is noted for its MemoryModelerTM,...
Tags: performance
Research articles 1998-10-05
COMPASS Selected by Texas Instruments to Provide Standard Cell Library
SAN FRANCISCO--BUSINESS WIRE--June 12, 1995--COMPASS Design Automation, Inc., a leader in electronic design automation EDA software and libraries for submicron design, today announced at the 1995 Design Automation Conference that it has been selected by Texas Instruments, a leading supplier of application- specific integrated circuits ASICs, for development of standard...
Tags: ASIC, Cell, Texas Instruments Inc.
Research articles 1995-06-12
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