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	<description><![CDATA[White papers, case studies, business articles, and blog posts relating to asic and xilinx inc.]]></description>
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		<title><![CDATA[Synplicity and Xilinx® to Hold Worldwide ASIC Verification Seminar Series]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2007_Sept_26/ai_n27387265]]></link>
		<description><![CDATA[Companies Highlight New Approaches to Accelerate ASIC, ASSP and SoC Verification Using FPGAs]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 26 Sep 2007 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/xilinx+inc..html"><![CDATA[Xilinx Inc.]]></category>
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		<title><![CDATA[Synplicity's Certify Software Eases ASIC Prototyping with Support for Xilinx Virtex-5 FPGAs]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2007_Jan_29/ai_n17155846]]></link>
		<description><![CDATA[Software Extends Automation of ASIC Prototyping Flow; Enhances Quick Partitioning Technology]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 29 Jan 2007 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<category domain="http://resources.bnet.com/topic/xilinx+inc..html"><![CDATA[Xilinx Inc.]]></category>
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		<title><![CDATA[Synopsys, Xilinx Target ASIC Prototypers (Electronic News)]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_hb5934/is_200410/ai_n23913354]]></link>
		<description><![CDATA[Synopsys Inc., which pioneered the logic synthesis tool, is lending its expertise to ASICs prototyping engineers with support for the Xilinx Virtex-4 family of FPGAs in its Design Compiler FPGA tool and ISE 6.3i place and route software.      Synopsys Inc., which pioneered the logic synthesis...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 04 Oct 2004 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/tool.html"><![CDATA[tool]]></category>
		<category domain="http://resources.bnet.com/topic/xilinx+inc..html"><![CDATA[Xilinx Inc.]]></category>
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		<title><![CDATA[IBM, Xilinx Shake Up Art of Chip Design With New Custom Product; Embedding Xilinx FPGA Technology Into IBM ASICs to Offer Designers Unprecedented Flexibility]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2002_June_24/ai_87694341]]></link>
		<description><![CDATA[Business/High Tech Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 24 Jun 2002 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
		<category domain="http://resources.bnet.com/topic/ibm+corp..html"><![CDATA[IBM Corp.]]></category>
		<category domain="http://resources.bnet.com/topic/xilinx+inc..html"><![CDATA[Xilinx Inc.]]></category>
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		<title><![CDATA[Xilinx, IBM tie the knot: next-generation PLD being made IBM ASIC-ready]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EKF/is_26_48/ai_88100299]]></link>
		<description><![CDATA[IBM has expanded its design and fab engineering alliance with Xilinx to create hybrid ASICs with embedded Xilinx FPGA cores by 2004, when IBM's 90nm process is in production.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 24 Jun 2002 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/ibm+corp..html"><![CDATA[IBM Corp.]]></category>
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		<title><![CDATA[VIPswitch Partners With Xilinx to Move Beyond Asics for Optical Switch/Routing; Remotely Programmable Chips are a Perfect Fit for New Line of Optical Terabit Routers]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2001_March_28/ai_72392974]]></link>
		<description><![CDATA[Business & High Tech Editors]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 28 Mar 2001 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/chip.html"><![CDATA[chip]]></category>
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		<title><![CDATA[Xilinx Announces Record-breaking Demonstration of Data Encryption Standard; Run-time Reconfiguration Pushes FPGA Performance Past ASICs]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2000_April_28/ai_61806976]]></link>
		<description><![CDATA[Business Editors/High-tech Writers]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Fri, 28 Apr 2000 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<title><![CDATA[Xilinx and Qualis Partner to Develop Internet-enabled Design Reuse Methodology for ASIC and FPGA Designers]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2000_March_20/ai_60267375]]></link>
		<description><![CDATA[Business Editors & High-Tech Writers]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 20 Mar 2000 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/fpga.html"><![CDATA[FPGA]]></category>
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		<category domain="http://rss.financialcontent.com/stocksymbol">XLNX</category>
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		<title><![CDATA[Xilinx and Synopsys Enable ASIC Designers' Adoption of Xilinx FPGAs]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2000_March_3/ai_59712112]]></link>
		<description><![CDATA[Business Editors & High-Tech Writers]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Fri, 03 Mar 2000 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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		<title><![CDATA[Xilinx and Synopsys Enable ASIC Designers Adoption of Xilinx FPGAs]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2000_March_3/ai_59712218]]></link>
		<description><![CDATA[Business Editors/High-Tech Writers]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Fri, 03 Mar 2000 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
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