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fpga

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FPGA Architecture
Altera FPGA architecture is unmatched in the industry and is at least one generation ahead of the competition in terms of logic architecture and two generations ahead in terms of routing architecture. The Adaptive Logic Module ALM ability to divide the combinational logic portion and the availability of eight inputs...
Tags: FPGA, Altera Corp., industry
White papers 2006-07-01
Routability-Driven Packing: Metrics and Algorithms for Cluster-Based FPGAS
Most of the FPGA's area and delay are due to routing. Considering routability at earlier steps of the CAD flow would both yield better quality and faster design process. This paper discusses the metrics that affect routability in packing logic into clusters. It presents a routability-driven clustering method for cluster-based...
Tags: Engineering, FPGA, algorithm, CAD, clustering
White papers 2003-01-16
VLSI Design of Digit-Serial FPGA Architecture
This paper presents a novel application-specific field-programmable gate array FPGA architecture that satisfies efficient implementation of digit-serial DSP architectures on a digit wide basis. Digit-serial DSP designs have been an effective implementation method for FPGAs. To efficiently realize a digit-serial DSP design on FPGAs, one must create an FPGA architecture...
Tags: FPGA, DSP, VLSI
White papers 2002-10-28

Additional Resources

eASIC Enables Nexus Chips to Reduce Power Consumption by 80% Over FPGAs
eASIC's Zero Mask-Charge ASIC Devices Enable Nexus Chips to Increase Performance by 2X and Reduce FPGA Power Consumption by 80% for 3D Video Applications SANTA CLARA, Calif. -- eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced that Nexus Chips, a leading Korean provider of graphics...
Articles 2008-07-08
Software Radio PMC Module handles power metering/beamforming
Model 7152 digitizer has 4 x 200 MHz, 16-bit A/D converters and 32-channel digital down converter DDC with 20 kHz to 10 MHz bandwidth. Single-slot module offers DDC gain and phase adjustments, signal summation, and decimation range programmable from 16-8,192. Device features 32 power meters that continuously measure individual average...
Articles 2008-07-03
Mezzanine Card utilizes FPGA technology for DSP applications
Available in 5 ruggedization levels, XMCV5 Mezzanine Card offers choice of 3 Xilinx[R] VirtexTM-5 FPGAs: FX100T, SX95T, and LX110T. It can be mounted on range of GE Fanuc 3U and 6U SBCs, is compliant with VITA-42 XMC standard, and is available in both PCIe[R] and Serial RapidIO configurations. Other configuration...
Articles 2008-07-02
Samplify Systems Announces Distribution Agreement With Tokyo Electron Device Limited, Broadening Availability of Signal Compression Technology
SANTA CLARA, Calif. and YOKOHAMA CITY, Japan, July 2 /PRNewswire/ -- Samplify Systems, Inc., a real-time signal compression technology company, and Tokyo Electron Device Limited TED, the leading Japanese distributor of Xilinx FPGAs, manufacturer of inrevium evaluation board solutions, and provider of FPGA design services, announced an agreement for...
Articles 2008-07-02
Mezzanine System speeds development of board-level solutions
Featuring modular design, Micro Mezzanine System provides range of FPGA-based carrier boards and variety of 11/4 in. square electrical conversion modules that can be assembled in thousands of combinations. Users can incorporate multiple functions on single board, go from prototype to production with single product, use available system expansion capacity,...
Articles 2008-07-01
Norwegian high-tech company VMETRO ASA wins new orders in Germany
NORDIC BUSINESS REPORT-1 July 2008-Norwegian high-tech company VMETRO ASA wins new orders in GermanyC1994-2008 M2 COMMUNICATIONS LTD http://www.m2.com Norwegian high-tech company VMETRO ASA (OSE: VME) said on Tuesday (1 July) that its subsidiary VSYSTEMS has secured new orders for a total of EUR900,000 from an unnamed German defence...
Articles 2008-07-01
Altera Increases Productivity for High-Performance DSP Designs by an Order of Magnitude
DSP Builder Version 8.0 Features Second-Generation Timing-Driven Simulink Synthesis Technology SAN JOSE, Calif. -- Targeting high-performance digital signal processing DSP designs, Altera Corporation (NASDAQ:ALTR) today announced its DSP Builder tool version 8.0, featuring second-generation model-based synthesis technology. This technology allows DSP designers for the first time to automatically...
Articles 2008-06-30
ARM7™-Based MCU offers FPGA interface to multilayer AHB
Offering engineering-free migration path to lower-power, customizable MCU, AT91CAP7E features direct FPGA interface that makes FPGA look and work as if it is on internal bus of MCU. This 2-chip, no-NRE, FPGA-plus ARM7 solution includes 6-layer advanced high-speed bus AHB, peripheral DMA controller, and 160 KB on-chip SRAM. Integrated peripherals...
Articles 2008-06-30
ADC can handle demanding applications
Designed for software-defined radio, diagnostic imaging, and radar/signals intelligence, Model ICS-1650 high-speed ADC features four 12-bit analog input channels with simultaneous sampling at up to 250 MHz. It has 4-lane PCI Express interface that provides up to 1.25 GB/sec net payload data rate, enabling continuous data acquisition at sample rates...
Articles 2008-06-27
ProDesign CHIPit ASIC Prototyping System Accelerates Marvell ASIC Verification
ProDesign's CHIPit Verification System Successfully Integrated into Marvell's Printer Division for Design and System Prototyping and Debugging SAN JOSE, Calif. -- ProDesign, a leading supplier of scalable-high speed ASIC and SoC prototyping platforms, today announced that Marvell([R]) Semiconductor's Printer Division has successfully integrated the CHIPit prototyping flow. Marvell...
Articles 2008-06-26
Power Management IC promotes portable design flexibility
Offering 4 output voltages in 3 x 3 mm MLF[R]-16 lead package, MIC2811/21 combines DC/DC converter with 3 LDO regulators is suited for providing voltages necessary for system core, I/O, auxiliary, and external memory supplies found in portable devices. Model MIC2811 supports optional bypass capacitor to optimize noise and PSRR...
Articles 2008-06-25
Agility Introduces Programmable Platform for Image and Signal Processing
The RC240 Combines an FPGA and ARM CPU Saving Months on Algorithm Prototyping PALO ALTO, Calif. -- Agility Design Solutions Inc., a leading provider of embedded system solutions enabling rapid implementation of complex image and signal processing algorithms, announced today the availability of the RC240 programmable...
Articles 2008-06-24
Lattice Enhances Its Wireless Base Station Solutions Portfolio
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the availability of three new Intellectual PropertyIP core and reference design products targeting the wirelesscommunications market. The products include RF/IF processingfunctionality, as well as upgraded support for industry-standard basestation connectivity protocols. The designs are optimized to run on theLatticeECP2MTM FPGA family...
Articles 2008-06-23
Aldec Delivers Clock Domain Crossing Solution
HENDERSON, Nev. -- Aldec, Inc., a pioneer in mixed-language simulation and verification for ASIC and FPGA devices, today announced ALINT 2008.06. The software compares Verilog source code against 195 design rules based on STARC[R] 2006. ALINT gives engineers instant feedback on structural, coding and consistency problems early in the design...
Articles 2008-06-23
Mitrionics Previews FPGA-Based Green Computing and Hybrid Computing Strategies for HP Platforms at ISC'08
ISC'08 -- Mitrionics, Inc., developer ofthe Mitrion Virtual Processor MVP and the Mitrion Software AccelerationPlatform, will be exhibiting its latest technologies for FPGA-basedaccelerated computing at the International Supercomputing Conference ISCbeing held June 17-20 in Dresden, Germany. Mitrionics will discuss futurehybrid computing strategies and support for accelerated computing solutionsfor the HP...
Articles 2008-06-19
PC-Based Digitizer is suited for OEMs
Designed for OEMs who require analog-to-digital conversion in their systems, BASE-8 CompuScope Digitizer offers single digitizing channel with 8-bit resolution, 200 MHz bandwidth, and up to 500 MS/sec sampling speeds. Customizable features include channel counts (2 or more channels), up to 2 GS/sec sampling rates, eXpert on-board FPGA signal analysis...
Articles 2008-06-19
New Publishing and Version Control Features From Altium Put Real Control of Design Data Back in Organizations' Hands
Altium(ASX: ALU), the leading developer of unified electronics design solutions,has added new project management and design data publishing capabilities toits unified electronic design solution that significantly help electronicsdesigners manage the complexity of today's multi-faceted design projects. Altium's unified solution, Altium Designer, is based on a single data modelthat lets designers...
Articles 2008-06-18
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