Altera FPGA architecture is unmatched in the industry and is at least one generation ahead of the competition in terms of logic architecture and two generations ahead in terms of routing architecture. The Adaptive Logic Module ALM ability to divide the combinational logic portion and the availability of eight inputs...
Most of the FPGA's area and delay are due to routing. Considering routability at earlier steps of the CAD flow would both yield better quality and faster design process. This paper discusses the metrics that affect routability in packing logic into clusters. It presents a routability-driven clustering method for cluster-based...
This paper presents a novel application-specific field-programmable gate array FPGA architecture that satisfies efficient implementation of digit-serial DSP architectures on a digit wide basis. Digit-serial DSP designs have been an effective implementation method for FPGAs. To efficiently realize a digit-serial DSP design on FPGAs, one must create an FPGA architecture...
eASIC's Zero Mask-Charge ASIC Devices Enable Nexus Chips to Increase Performance by 2X and Reduce FPGA Power Consumption by 80% for 3D Video Applications SANTA CLARA, Calif. -- eASIC Corporation, a provider of zero mask-charge ASIC devices, today announced that Nexus Chips, a leading Korean provider of graphics...
Model 7152 digitizer has 4 x 200 MHz, 16-bit A/D converters and 32-channel digital down converter DDC with 20 kHz to 10 MHz bandwidth. Single-slot module offers DDC gain and phase adjustments, signal summation, and decimation range programmable from 16-8,192. Device features 32 power meters that continuously measure individual average...
Available in 5 ruggedization levels, XMCV5 Mezzanine Card offers choice of 3 Xilinx[R] VirtexTM-5 FPGAs: FX100T, SX95T, and LX110T. It can be mounted on range of GE Fanuc 3U and 6U SBCs, is compliant with VITA-42 XMC standard, and is available in both PCIe[R] and Serial RapidIO configurations. Other configuration...
SANTA CLARA, Calif. and YOKOHAMA CITY, Japan, July 2 /PRNewswire/ -- Samplify Systems, Inc., a real-time signal compression technology company, and Tokyo Electron Device Limited TED, the leading Japanese distributor of Xilinx FPGAs, manufacturer of inrevium evaluation board solutions, and provider of FPGA design services, announced an agreement for...
Featuring modular design, Micro Mezzanine System provides range of FPGA-based carrier boards and variety of 11/4 in. square electrical conversion modules that can be assembled in thousands of combinations. Users can incorporate multiple functions on single board, go from prototype to production with single product, use available system expansion capacity,...
NORDIC BUSINESS REPORT-1 July 2008-Norwegian high-tech company VMETRO ASA wins new orders in GermanyC1994-2008 M2 COMMUNICATIONS LTD http://www.m2.com Norwegian high-tech company VMETRO ASA (OSE: VME) said on Tuesday (1 July) that its subsidiary VSYSTEMS has secured new orders for a total of EUR900,000 from an unnamed German defence...
DSP Builder Version 8.0 Features Second-Generation Timing-Driven Simulink Synthesis Technology SAN JOSE, Calif. -- Targeting high-performance digital signal processing DSP designs, Altera Corporation (NASDAQ:ALTR) today announced its DSP Builder tool version 8.0, featuring second-generation model-based synthesis technology. This technology allows DSP designers for the first time to automatically...
Offering engineering-free migration path to lower-power, customizable MCU, AT91CAP7E features direct FPGA interface that makes FPGA look and work as if it is on internal bus of MCU. This 2-chip, no-NRE, FPGA-plus ARM7 solution includes 6-layer advanced high-speed bus AHB, peripheral DMA controller, and 160 KB on-chip SRAM. Integrated peripherals...
Designed for software-defined radio, diagnostic imaging, and radar/signals intelligence, Model ICS-1650 high-speed ADC features four 12-bit analog input channels with simultaneous sampling at up to 250 MHz. It has 4-lane PCI Express interface that provides up to 1.25 GB/sec net payload data rate, enabling continuous data acquisition at sample rates...
ProDesign's CHIPit Verification System Successfully Integrated into Marvell's Printer Division for Design and System Prototyping and Debugging SAN JOSE, Calif. -- ProDesign, a leading supplier of scalable-high speed ASIC and SoC prototyping platforms, today announced that Marvell([R]) Semiconductor's Printer Division has successfully integrated the CHIPit prototyping flow. Marvell...
Offering 4 output voltages in 3 x 3 mm MLF[R]-16 lead package, MIC2811/21 combines DC/DC converter with 3 LDO regulators is suited for providing voltages necessary for system core, I/O, auxiliary, and external memory supplies found in portable devices. Model MIC2811 supports optional bypass capacitor to optimize noise and PSRR...
The RC240 Combines an FPGA and ARM CPU Saving Months on Algorithm Prototyping PALO ALTO, Calif. -- Agility Design Solutions Inc., a leading provider of embedded system solutions enabling rapid implementation of complex image and signal processing algorithms, announced today the availability of the RC240 programmable...
Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the availability of three new Intellectual PropertyIP core and reference design products targeting the wirelesscommunications market. The products include RF/IF processingfunctionality, as well as upgraded support for industry-standard basestation connectivity protocols. The designs are optimized to run on theLatticeECP2MTM FPGA family...
HENDERSON, Nev. -- Aldec, Inc., a pioneer in mixed-language simulation and verification for ASIC and FPGA devices, today announced ALINT 2008.06. The software compares Verilog source code against 195 design rules based on STARC[R] 2006. ALINT gives engineers instant feedback on structural, coding and consistency problems early in the design...
ISC'08 -- Mitrionics, Inc., developer ofthe Mitrion Virtual Processor MVP and the Mitrion Software AccelerationPlatform, will be exhibiting its latest technologies for FPGA-basedaccelerated computing at the International Supercomputing Conference ISCbeing held June 17-20 in Dresden, Germany. Mitrionics will discuss futurehybrid computing strategies and support for accelerated computing solutionsfor the HP...
Designed for OEMs who require analog-to-digital conversion in their systems, BASE-8 CompuScope Digitizer offers single digitizing channel with 8-bit resolution, 200 MHz bandwidth, and up to 500 MS/sec sampling speeds. Customizable features include channel counts (2 or more channels), up to 2 GS/sec sampling rates, eXpert on-board FPGA signal analysis...
Altium(ASX: ALU), the leading developer of unified electronics design solutions,has added new project management and design data publishing capabilities toits unified electronic design solution that significantly help electronicsdesigners manage the complexity of today's multi-faceted design projects. Altium's unified solution, Altium Designer, is based on a single data modelthat lets designers...
Articles 2008-06-18
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