Intel Corp.

Paul S. Otellini is president and CEO of Intel Corporation, the world's leading manufacturer of microprocessors for personal and business computing. Intel technology is creating new ways for the world to work, learn and play by extending the reach of the Internet and solving business problems. Since joining Intel in 1974, Otellini has managed several Intel businesses, including the company's PC and server microprocessor division and the global sales and marketing organization. In 2002, Otellini was elected to Intel's board of directors and promoted to president and chief operating officer. He was named CEO in May 2005, a role in which he's focused on driving the company's growth and mission to deliver innovative, energy-efficient products. Under Otellini's guidance, Intel also aims to usher in a new era when portable wireless computing is available anytime, anywhere. The company also is focused on bringing the next billion people online with affordable computers tailored to their needs. Otellini received a bachelor's degree in economics from the University of San Francisco in 1972, and an MBA from the University of California, Berkeley in 1974. Otellini serves on the board of directors of Google Inc.

Christopher J. (CJ) Bruno is a vice president of the Sales and Marketing Group and president of Intel Americas Inc. He is responsible for Intel's sales & marketing results in the Americas. After joining Intel in 1984 and spending 3 years in business/manufacturing planning, Bruno has spent the balance of his Intel career in various sales and marketing assignments. After his early years in 80286 processor business planning, he moved to large account customer marketing. Bruno then spent over 10 years in sales driving Intel's business with a large multi-national customer, holding positions of field sales engineer and market development manager. Bruno joined the Americas Sales & Marketing management staff in 1999 to manage the market development team driving the company's marketing and sales engagements with customers across the geography. For the last 6 years, Bruno was director of marketing for the Americas, responsible for driving consumption demand, brand building and revenue by planning and executing Intel's marketing strategies in the Americas across all products and customer segments.

Ajay Bhatt is an Intel Fellow and Chief Client Platform Architect in a Mobile Platforms Group. Bhatt leads definition and development of the next-generation Client Platform architecture. He is primarily focused on the novel advances in platform hardware and software by working with key internal and external technology partners to develop the future Client Platform Architectures and Technologies. As a lead Client Platform Architect, Ajay also works with key business and planning groups to be at the forefront of the future Client Platform innovation areas by setting Intel-wide and industry-impacting strategies. In addition, Bhatt continues to hold a position of Intel's Chief I/O architect. In his role as a Chief I/O architect, he is responsible for the platform and I/O interconnects directions for Intel; leading the definition of next-generation platform architectures and I/O technologies across the market segments internally and within the industry. Bhatt is an industry-recognized expert in the area of I/O technologies. At Intel, Bhatt has been instrumental in driving definition and development of broadly adopted technologies such as USB, Accelerated Graphics Port, PCI Express, Platform Power management architecture and various chipset enhancements. Bhatt joined Intel in 1990 as a senior staff architect on the chipset architecture team in Folsom. Bhatt received his master's degree from The City University of New York. He holds nine U.S. patents with several in various stages of filing. In 1998, 2003 and 2004 Bhatt was nominated to take part in a Distinguished Lecture Series at leading universities in the United States and Asia. He received an Achievement in Excellence Award for his contribution in PCI Express specification development in 2002.

Andy D. Bryant is executive vice president, Finance and Enterprise Services, and chief administrative officer of Intel Corporation. He is responsible for financial operations, human resources, information technology and e-business functions and activities worldwide. Bryant joined Intel in 1981 as controller for the Commercial Memory Systems Operation and in 1983 became Systems Group Controller. In 1987 he was promoted to director of Finance for the corporation, and was appointed vice president and director of Finance of the Intel Products Group in 1990. Bryant became CFO in February 1994, and was promoted to senior vice president in January 1999. Bryant expanded his role to Chief Financial and Enterprise Services Officer in December 1999. In October 2007, Bryant was named Chief Administrative Officer. Prior to joining Intel, he held positions in finance at Ford Motor Company and Chrysler Corporation. Bryant holds a bachelor's degree in Economics from the University of Missouri and an master's degree in Business Administration with a concentration in finance from the University of Kansas.

Brendan Traw is an Intel Fellow and chief technology officer for Intel's Digital Home Group. He is responsible for the technology roadmap, industry standards, strategic initiatives and architecture for Intel's consumer electronics platforms. Previously, Traw focused on the management and protection of entertainment content in digital environments, leading the team which developed Digital Transmission Content Protection (DTCP), the basis for content protection in today's digital home networks, as well as a range of other content protection solutions for recordable DVD, DVD-Audio, SDcard, and the DVI/HDMI display interfaces. A recognized leader across the computer, consumer electronics and content industries, he has published numerous papers and holds 19 patents in the areas of content protection, system architecture, and network security. Traw received his Ph.D. in computer information science from the University of Pennsylvania.

Diane M. Bryant is vice president and Chief Information Officer (CIO) of Intel Corporation where she is responsible for Intel's Information Technology organization. Intel's IT organization delivers strategic value by providing professional support, applications, and solutions that enable Intel's growth and transformation. Previously, Bryant held several positions including general manager of the Server Platforms Group, responsible for Intel's server, workstation, and storage business encompassing all elements of the platform including hardware, software and services. She was also director of the Corporate Platform Office, responsible for driving the transformation of Intel to a platform directed company, and GM of the Enterprise Processor Division responsible for the architecture, design and delivery of Intel's Xeon and Itanium processor families. Before joining the Enterprise group in 1998, Bryant was Director of Engineering of the Mobile Products Group responsible for Intel's mobile processors and chipsets. Bryant received her bachelor's degree in electrical engineering from U.C. Davis in 1985 and joined Intel the same year. She holds four U.S. Patents.

Doug Busch is vice president and chief technology officer of Intel Corporation's Digital Health Group. Busch was formerly the Chief Information Officer (CIO) of Intel Corporation. In this role, he was responsible for leading Intel's global Information Services and Technology Group (ISTG) which supports more than 75,000 employees in 50 countries. ISTG's mission is to keep Intel running and growing by delivering such critical information capabilities as business applications, productivity solutions, voice and data networking, data center operations, and custom information solutions. ISTG also supports global manufacturing operations and provides scientific computing capabilities to more than 17,000 Intel engineers worldwide. Busch joined Intel in 1987 and has held various technical and management positions in manufacturing, logistics, and information technology. He was the principal architect of Intel's intranet and drove the introduction of advanced technology to improve manufacturing systems' effectiveness. Busch was named vice president of the Information Technology group in June 1999, was elected a corporate vice president in 2000, and was appointed co-CIO in 2002. Prior to joining Intel, Busch managed research and development programs at Battelle Memorial Institute, including advanced automation programs for the aerospace and nuclear industries. Busch holds a bachelor's degree in mechanical engineering from Ohio State University.

Doug Carmean is an Intel Fellow and Larrabee chief architect in the Visual Computing Group of Intel's Digital Enterprise Group. He is responsible for creating the vision and concept for a fully programmable graphics pipeline based on IA processors that supports highly visual and parallel workloads. Carmean led the team that founded a new group at Intel to define, build and productize products from an architecture that targets the high-end discrete graphics business. He is responsible for growing the development of Larrabee from an early concept to a core piece of Intel's graphics strategy. Carmean enlisted and included key industry software developers in Larrabee's definition to ensure a compelling product. Since joining Intel in 1989, he has held several key roles and provided leadership in Intel's microprocessor architecture development and product roadmap. As Nehalem's first chief architect, a next-generation x86 flagship processor, he led the team during the early phases of architecture definition. Prior to this position, he was a principal architect for the Pentium 4 processor where he completed the memory cluster and power architecture definition including algorithms, structures and overall functionality. Carmean holds more than 20 patents and many pending in processor architecture and implementation, memory subsystems and low power design. He has published more than a dozen technical papers and he has received the Intel Achievement Award three times. Carmean earned his bachelor's degree in electrical engineering from Oregon State University in 1985.

John N. Johnson is vice president and Co-Chief Information Officer (CIO) at Intel Corporation where he is responsible for Intel's Information Technology organization. Intel's Information Technology organization has over 5,500 IT professionals spanning more than 50 countries and supports over 80,000 employees. These IT professionals support and develop enterprise business applications, productivity solutions, engineering applications, manufacturing applications, voice and data networking, data centre operations, and custom information solutions. Johnson is also the director of Intel's Corporate Emergency Operations Center, a corporate team to manage through emergency/disaster events. Johnson joined Intel in 1981 and held technical positions in sales, marketing, and business development. In 1992, he became the director of Worldwide Technical Marketing, responsible for all applications, customer technical support, and influencer sales activities worldwide. He joined the IT organization in 1999 and in 2003 became a Vice President responsible for the IT Customer Services organization. He was appointed to the CIO position in February 2005. Johnson was elected a corporate vice president in 2008. Additionally, Johnson is Vice Chair of the California Capital Region United Way board of directors. Johnson received his Bachelor of Science Degree in Inter-disciplinary Engineering from Purdue University in 1976.

Justin Rattner, 59, is vice president and chief technology officer (CTO). He is also an Intel Senior Fellow and head of the Corporate Technology Group. In the latter role, he directs Intel's global research efforts in microprocessors, systems, and communications including the company's disruptive research activity. In 1989, Rattner was named Scientist of the Year by R&D Magazine for his leadership in parallel and distributed computer architecture. In December 1996, Rattner was featured as Person of the Week by ABC World News for his visionary work on the Department of Energy ASCI Red System, the first computer to sustain one trillion operations per second (one teraFLOPS) and the fastest computer in the world between 1996 and 2000. In 1997, Rattner was honored as one of the Computing 200, the 200 individuals having the greatest impact on the U.S. computer industry today, and subsequently profiled in the book Wizards and Their Wonders from ACM Press. Rattner has received two Intel Achievement Awards for his work in high performance computing and advanced cluster communication architecture. He is a member of the executive committee of the Intel's Research Council and serves as the Intel executive sponsor for Cornell University where he is a member of the External Advisory Board for the School of Engineering. Rattner is also a trustee of the Anita Borg Institute for Women and Technology. Rattner joined Intel in 1973. He was named its first Principal Engineer in 1979 and its fourth Intel Fellow in 1988. Prior to joining Intel, Rattner held positions with Hewlett-Packard Company and Xerox Corporation. He holds B.S. and M.S. degrees from Cornell University in electrical engineering and computer science.

Richard Uhlig is an Intel Fellow and chief architect for Intel's Virtualization Initiative. Uhlig started virtualization efforts within Intel in 1998 as a research project in the Corporate Technology Group (CTG) and has since led the definition of multiple generations of virtualization architecture for Intel processors and platforms, known collectively as "Intel Virtualization Technology" (Intel® VT). Intel VT is today used in a variety of settings and applications to improve the utilization, management, availability, and security of systems based on Intel Architecture. In addition to his work on the definition of Intel VT, Uhlig has led several successful software prototyping projects, including software emulators and research virtual-machine monitors for VT. These prototypes have been used extensively within Intel to inform VT architecture definition, and for virtualization usage-model analysis, hardware validation, technology demonstrations, and for early VT software development. Prior to joining Intel in 1996, Uhlig held post-doctoral fellowships at the European national research labs of Germany, Greece and France, where he worked on advancing simulation technology and on architectural support for modern operating-system design. Uhlig has published more than 20 technical papers, holds 24 patents and has received two Intel Achievement Awards. Uhlig graduated with highest honors from the University of Michigan, Ann Arbor, with a bachelor's degree in computer engineering in 1988. Subsequently from the same school, he earned a master's degree in computer science and engineering in 1993, and a Ph.D. in computer science and engineering in 1995.

Sean Maloney is executive vice president of Intel Corporation and chief sales and marketing officer. He has been with Intel since 1982. Maloney began his Intel career in its European headquarters where he spent nine years, first as Intel UK's manager of applications engineering, then as country manager of Intel UK, and director of marketing for Intel Europe. From 1992 to 1995, Maloney served as technical assistant to the chairman and chief executive of Intel, Dr. Andrew S. Grove. In 1995, Maloney moved to Hong Kong to manage Intel's sales and marketing activities in Asia Pacific. In 1998 he returned to the United States to become head of Intel's worldwide sales organization. He was promoted to senior vice president in 1999 and executive vice president in 2001. He took over as head of Intel Communications Group (ICG) later that year and became co-manager with David Perlmutter of the Mobility Group in 2004. In July 2006 Maloney was appointed Chief Sales & Marketing Officer. Mr. Maloney is a member of the board of Autodesk Inc, and the Board of Directors of the National Committee on United States-China Relations, Inc.

Siavash M. Alamouti is an Intel Fellow in the Mobility Group and chief technology officer of the Mobile Wireless Group, responsible for all wireless standards with a product roadmap at Intel. This includes the WiMAX Forum, IEEE 802.16, 3GPP, OMA, WiFi Alliance and IEEE 802.11. He is also known as the technical champion of WiMAX technology at Intel. Prior to joining Intel in 2004, Alamouti worked for Vivato Inc., Cadence Design Systems, AT&T Wireless Services and MPR Teltech Ltd. in various engineering roles. Alamouti completed his graduate studies in electrical engineering at the University of British Columbia, Vancouver, Canada. He is recognized by the IEEE Communications Society as the author of one of the best 57 papers in the past 50 years of the Society’s history. He is most well known for the invention of "the Alamouti code" which is included in a number of wireless standards. Alamouti holds more than 20 patents in the areas of wireless communications and wireless systems design. He has authored many publications and technical reports in the last decade for the IEEE Communications Society and other organizations that have reached professional audiences both nationally and internationally.

Stacy J. Smith is vice president of Finance and Enterprise Services and the chief financial officer (CFO) for Intel Corporation. In this role, he is responsible for leading the worldwide finance organization, and overseeing operational finance, accounting and reporting, tax, treasury, internal audit, and investor relations. Smith joined Intel in 1988 and has held positions in Finance, Sales and Marketing, and Information Technology. In March of 2006 he was appointed assistant chief financial officer. He has also held the position of chief information officer where he was responsible for Intel's Information Technology Group. He was the general manager of Intel Europe, Middle East and Africa (EMEA) where he was responsible for Intel product sales and marketing in the EMEA region. Smith became vice president of Sales and Marketing in 2002. Over the years, he has held Finance positions in various divisions, Components Manufacturing, Systems Manufacturing, and Sales and Marketing. He has been located with Intel in the US, Asia, Europe, and Latin America. Smith is a graduate from the University of Texas where he earned his MBA degree in Finance in 1988.

Stephen S. Pawlowski is an Intel Senior Fellow. He is the Digital Enterprise Group chief technology officer and general manager for Architecture and Planning for Intel Corporation. Pawlowski joined Intel in 1982. He led the design of the first Multibus I Single Board Computer based on the 386 processor. He was a lead architect and designer for Intel's early desktop PC and high performance server products and was the co-architect for Intel's first P6 based server chipsets. He helped define the system bus interfaces for Intel's P6 family processors, the Pentium® 4 processor and Itanium™ processor. He also created and led the research for Intel's agile radio architecture for a future generation of wireless products and prior to his current assignment was the director of Corporate Technology Group's Microprocessor Technology Lab. Pawlowski graduated from the Oregon Institute of Technology in 1982 with bachelor's degrees in electrical engineering technology and computer systems engineering technology, and received a master's degree in computer science and engineering from the Oregon Graduate Institute in 1993. Pawlowski holds 56 patents in the area of system, and microprocessor technologies. He has received three Intel Achievement Awards.

Abel Weinrib is vice president of the Corporate Technology Group and director of the Corporate Technology Group for Intel Corporation. He is responsible for Intel’s visionary research and technology innovation for future platforms. The Corporate Technology Group is a centralized R&D organization focusing on a broad portfolio of disruptive research, emerging technology development, industry standards, and world-wide technology policy. The group’s current areas of focus include parallel processing, silicon photonics and radios, future processor architectures, next-generation wireless communications, high-performance and trustworthy networking, virtualization, platform trust and security, energy efficient platforms, ethnography-based user studies and ubiquitous computing. Previously, Weinrib was responsible for driving Intel’s leadership in communications and networking technologies as director of the Communications Technology Lab. In that role he focused on trustworthy networking, platform-based network acceleration and silicon innovation for radio and optical communications. Weinrib joined Intel in 1994 and has held a variety of senior positions within the Corporate Technology Group. Before coming to Intel, Weinrib was a member of the technical staff at Bell Communications Research. Weinrib received his bachelor’s degree from MIT in 1979 and his Ph.D. from Harvard University in 1983, both in physics. From 1994 to 2001, he served as executive director of the Internet Architecture Board and from 1995 to 1999 was chair of the Internet Research Task Force. Weinrib has been published broadly in the fields of networking and communications.

Alan Crouch is vice president of the Corporate Technology Group and director of the Communications Technology Lab for Intel Corporation. His lab's focus areas include mobile broadband innovation, advanced wireless platforms, energy-efficient communications, silicon photonics, performance networking and network security services. Crouch joined Intel in 1999. His labs have made fundamental wireless standards and technology contributions including Wi-Fi (802.11n), WiMAX (802.16e, 802.16m), Ultra-wideband (Wireless USB), 60GHz, and Multi-Radio Co-Existence. The Silicon Photonics research team has achieved breakthroughs in silicon based optical devices, including hybrid laser, high speed modulator, and GeSi detector innovation. Crouch's teams have delivered vPro™ platform networking innovations incorporated on Intel® Active Management Technology and Intel® I/O Acceleration Technology roadmaps. Crouch launched the Communications Technology Lab in the Intel China Research Center. He has led research industry engagements with Nokia, British Telecom, Cisco and Hewlett-Packard. Before joining Intel, Crouch was director of engineering at Network Computer Devices, Inc. and Tektronix Inc. Crouch has a bachelor's degree in computer science from Oregon State University. In 2008, he was honored with membership in the Oregon State University Academy of Distinguished Engineers.

Alex Peleg is vice president, Intel Mobility Group and director of Intel Architecture Strategic and Platform Planning. In this role he is responsible for driving to resolution key strategic issues regarding Intel Architecture directions across product groups (including certain client roadmap and processor design features). Previously, Peleg was strategic planning director for the Mobility Group as well as director of strategic planning for the Mobile Platforms Group where he was responsible for defining the strategy and roadmap for Intel products used in notebook computers. Peleg was part of the team based in Israel that defined the features that would be combined into what was later known as the Intel® Centrino® Processor Technology platform. Peleg joined Intel in 1991 as a microprocessor architect at the Israel Design Center in Haifa. He received his bachelor's degree in computer engineering from the Technion, Israel Institute of Technology in 1989 and his master's degree in electrical engineering in 1991 from the same university. Peleg holds more than 50 patents and has earned an Intel Achievement Award.

Andrew Chien is vice president of the Corporate Technology Group and director of Research for Intel Corporation. Chien previously served as the Science Applications International Corporation Endowed Chair Professor in the department of computer science and engineering, and the founding director of the Center for Networked Systems at the University of California at San Diego. CNS is a university-industry alliance focused on developing technologies for robust, secure, and open networked systems. For more than 20 years, Chien has been a global leader in research and development of high-performance computing systems. His expertise includes networking, Grids, high performance clusters, distributed systems, computer architecture, high speed routing networks, compilers, and object oriented programming languages. He is a Fellow of the American Association for Advancement of Science (AAAS), Fellow of the Association for Computing Machinery (ACM), Fellow of Institute of Electrical and Electronics Engineers (IEEE), and has published over 130 technical papers. Chien serves on the Board of Directors for the Computing Research Association (CRA), Advisory Board of the National Science Foundation’s Computing and Information Science and Engineering (CISE) Directorate, and Editorial Board of the Communications of the Association for Computing Machinery (CACM). From 1990 to 1998, Chien was a professor at the University of Illinois at Urbana-Champaign. During that time, he held joint appointments with both the National Center for Supercomputing Applications (NCSA) and the National Partnership for Advanced Computational Infrastructure (NPACI), working on large-scale clusters. In 1999 he co-founded Entropia, Inc., an enterprise desktop Grid company. Chien received his bachelor's in electrical engineering, master's and Ph.D. in computer science from the Massachusetts Institute of Technology.

Anne B. Gundelfinger is vice president of Legal and Corporate Affairs and associate general counsel for Intel Corporation. Most recently, Gundelfinger served as Intel’s director of Global Public Policy, and prior to that was responsible for worldwide Sales, Marketing, and Trademark Legal Affairs for Intel. She joined Intel in 1997 as director of Trademarks and Brands and was promoted to associate general counsel in 2001. Gundelfinger is currently on Leave of Absence. Gundelfinger began her career in 1985 as a staff attorney in the Bureau of Competition of the Federal Trade Commission in Washington, D.C. She then moved to private practice in 1987 with the firm of Fenwick and West, specializing in competition and intellectual property law. In 1992, she became director of trademarks at Sun Microsystems, Inc. Gundelfinger served on the board of directors of the International Trademark Association from 1996 through 2006, held various officer positions from 2000-2005, and served as its president in 2005. In addition, she served as Chair of the Coalition for Intellectual Property Rights from 2006 through 2007. She was selected by Managing Intellectual Property magazine as one of the world's 50 most influential people in intellectual property in July 2005. She is a member of Intellectual Asset Management magazine’s IP Hall of Fame Academy. Gundelfinger received her bachelor's degree in English literature and French language from the University of Virginia in 1982. She received her law degree from Boston University School of Law in 1985. Gundelfinger is a member of the California, Pennsylvania and District of Columbia bars, admitted to practice before the Ninth Circuit and the United States Supreme Court.

Arthur W. Roehm is vice president of the Sales and Marketing Group and director of Global Accounts - Dell. He is responsible for all aspects of Intel's relationship with Dell. Roehm joined Intel in 1988 as a field sales engineer responsible for OEM sales to distribution customers in the Midwest. In 1999 Roehm became the Dell account manager responsible for the mobile and server business and then moved into the role of worldwide sales manager responsible for global engagement with the Dell account. Roehm received his BSEE in 1982 from Michigan Technological University and his MBA from DePaul University in 1986. Prior to joining Intel Roehm worked as an engineering manager at Northrop Corporation and a field sales and applications engineer at Avantek.

Babak Sabi is vice president of the Technology and Manufacturing Group and director of Intel's Corporate Quality Network. He leads a company-wide network of quality and reliability organizations responsible for product reliability, customer satisfaction and quality business practices. He joined Intel in 1984. Previously, Sabi managed technology development quality and reliability, and was responsible for silicon technology certification, assembly, test, and board processes. Sabi received his Ph.D. in solid state electronics from The Ohio State University in 1984. He has written 10 papers on reliability physics and has received five Intel Achievement Awards. He currently holds two patents.

Bradley D. Daniels is vice president and director of engineering, Digital Home Group. He is responsible for the architecture, design, validation, software and manufacturing for Intel's consumer electronics devices. This includes the development of system-on-a-chip devices and a host of capabilities including 3-D graphics, high-definition video decode and encode, image processing, audio processing and a wide range of I/O support. Previously Daniels was responsible for development of Intel chipsets, graphics, the 80960 processor, and Intel's 8- and 16-bit microcontrollers. Daniels joined Intel in 1984 and most recently held a variety of engineering director and management roles in the chipset, graphics and 80960 businesses. He also worked as an individual contributor and supervisor on Intel's microcontrollers including the 80C196 family of products, the 8051 family and the 8048 family of 8-bit controllers. Daniels graduated from Arizona State University in 1984 with a bachelor's degree in electrical engineering.

Brian M. Krzanich is vice president and general manager of Manufacturing and Supply Chain for Intel Corporation. Krzanich is responsible for all aspects of Intel's factories and operations worldwide. Previously, Krzanich was responsible for Assembly Test from 2003 – 2007. From 2001-2003, he was responsible for the implementation of the 0.13-micron logic process technology across Intel's global factory network. From 1997 to 2001, Krzanich served as the Fab 17 plant manager, where he oversaw integrating Digital Equipment Corporation's semiconductor manufacturing operations into Intel's manufacturing network. The assignment included building updated facilities as well as initiating and ramping 0.18-micron and 0.13-micron process technologies. From 1996 to 1997, Krzanich was the Fab 6 plant manager in Arizona. From 1994 to 1996, he was a manufacturing manager for Fab 12 in Arizona. He also served as a process engineer at various Intel locations. Krzanich joined Intel in 1982. Krzanich was presented an Intel Achievement Award in 1999. He holds one patent for semiconductor processing. Krzanich received a bachelor's degree in Chemistry from San Jose State University in 1982.

Cary I. Klafter is vice president of Legal and Corporate Affairs, director of Corporate Legal and Corporate Secretary for Intel Corporation. He oversees legal activities for the company's financial matters, including SEC filings, investments, mergers and acquisitions and investor relations, and is co-chair of the company's Ethics and Compliance Oversight Committee. As Intel's corporate secretary he is responsible for corporate governance and board of directors activities. Prior to joining Intel in 1996, Klafter was an associate and partner with Morrison and Foerster law firm from 1972 to 1996. In addition, he chairs the Public Company Affairs Committee of the Society of Corporate Secretaries and Governance Professionals. Klafter received a law degree from the University of Chicago Law School in 1972. He also earned a master's degree in 1971 in criminal justice and a bachelor's degree in 1968 in political science from Michigan State University.

Chi-Hwa Tsang is vice president of the Technology and Manufacturing Group and director of Thin Films and Chemical Mechanical Polish (CMP) Technology for Intel. Tsang is responsible for the development and transfer of next-generation thin films and CMP modules that will produce future Intel microprocessors. Tsang joined Intel in 1983, working as a module engineer in the Portland Technology Development group. He has held various technical and management positions in etch, thin films, CMP and process integration. In his development roles, Tsang has contributed to the past nine process technologies, from early development through high-volume ramp. His most recent assignment included development, transfer and ramping of the high-k and metal gate modules of Intel's industry-leading 45nm technology. Tsang received a bachelor's degree in chemical engineering from National Cheng-Kung University in Taiwan in 1974. He earned a master's degree in chemical engineering from Clarkson College of Technology in 1978 and received a Ph.D. in materials science and engineering from the University of Pennsylvania in 1983. Tsang has been awarded seven patents.

Chiang Yuan Yang is vice president of the Technology and Manufacturing Group and co-manager of Intel Mask Operation at Intel Corporation. In this role, Yang is responsible for developing leading-edge mask technologies and tapeout support critical to Intel silicon patterning capabilities. He is also responsible for delivering high-quality masks to Intel fabs worldwide in support of all products. Primary focuses are on strategic direction, mask technology OGA, mask delivery throughput time reduction, and mask industry influencing and infrastructure development. Previously, Yang served as manager of the Intel Test Tooling Operation, responsible for developing test tooling solutions for Intel virtual factories. He also served a variety of managing positions for California Technology & Manufacturing. Yang joined Intel in 1984 as a senior staff engineer. Yang received his bachelor's degree in physics from National Taiwan University in 1970, and his master's degree from Northwestern University in 1972. He received his Ph.D. in materials science from the Massachusetts Institute of Technology in 1977. He has more than 20 published papers and three U.S. patents.

Christian Morales is vice president of the Sales and Marketing Group and general manager of Intel Europe, Middle East and Africa (EMEA). He is responsible for Intel® product sales and marketing in the EMEA region. Morales has held various senior international management roles in sales, channel operations and general management. He brings extensive experience in marketing and building brand awareness for new product segments, as well as a very strong background in expanding and driving Intel's business into new and emerging markets. Prior to this role, Morales was Intel's vice president of the Sales and Marketing Group and co-general manager of Asia Pacific responsible for implementing Intel's strategies in Asia. He was also responsible for championing Intel's worldwide emerging market strategy. Before that, he was general manager of Latin America and was instrumental in helping to establish a new regional headquarters and expand the company's regional presence throughout the continent. He joined the company in 1980 in Paris as an Intel field sales engineer and in 1983 became director for Spain and Portugal, and then moved back to Paris in senior positions to manage Western Europe channels and OEMs. He has been based in Paris, Madrid, Sao Paulo and Hong Kong. Morales graduated with an electrical engineering degree from the Electricity, Mechanics and Electronics Engineering School in Paris. In 1990, he completed the Young Managers Program in the MBA program at Insead.

Christina S. Min is vice president, Finance and Enterprise Services, and controller, Sales and Marketing Group (SMG). She is responsible for all financial and business management of Intel’s total revenue, SMG’s multi-billion-dollar worldwide marketing budget, and microprocessor profit and loss statement. In this role, she is involved in microprocessor and platform pricing, investment recommendations, risk management and internal controls. Previously, Min served as California Technology and Manufacturing controller and was responsible for financial management of microprocessor and flash development factory operations. In addition, she has held a variety of positions at Intel, including Graphics Division controller, microprocessor product finance manager and corporate planning finance manager. Before joining Intel in 1993, Min was with Digital Equipment Corporation where she served as systems integration business operations manager and other roles. Min received her bachelor’s degree from the University of Virginia in 1985, and her master’s degree in business administration from Simmons College in 1990.

Clemente J. Russo is vice president of the Digital Enterprise Group. Previously, he was vice president of the Flash Memory Group, responsible for coordinating key elements of the group’s transition to a new operating model that was more cost effective and included the integration of manufacturing activities into the business. Prior to that he served as vice president of the Sales and Marketing Group and director of marketing operations where he led the team that developed and implemented the company’s marketing transformation effort. Before that, he was vice president of the Technology and Manufacturing Group and general manager of systems manufacturing, responsible for worldwide manufacturing, outsource operations and post-sales support for computing and communications systems and boards. Russo was also director of manufacturing operations in the Communications Product Group, responsible for manufacturing Intel's board and system communications products. Prior to joining Intel in 1999, he was vice president of operations at Dialogic Corporation, where he was responsible for manufacturing, materials, quality control, IT, and facilities operations. When Intel acquired Dialogic in 1999, Russo co-managed the integration of the two companies. Russo received his bachelor's degree in electrical engineering from Manhattan College in New York in 1967.

Corine Perez is vice president of Finance and Enterprise Services and controller for the Digital Enterprise Group at Intel Corporation. In this role she is responsible for all aspects of financial regulatory compliance and financial control for the DEG. She is also responsible for supporting the Corporate Platform Office and is the Northwest “Godparent” for all Career Development Council activities on site for Operations Finance. Perez has held a variety of positions since joining Intel in 1980. Previously, she served as controller for the Intel Communications Group, Communications Products Group and Enterprise Server Group. She also was a central operations manager and controller for the OEM Products and Services Division. Perez received her bachelor's degree in social work and sociology from Idaho State University in 1975. She received her master's degree in business administration from Portland State University in 1980.

Craig C. Brown is vice president of the Technology and Manufacturing Group and director of Materials. He is responsible for ensuring the availability of materials and services to meet Intel production schedules and procurement needs of Intel employees. Brown has broad procurement and supply chain experience in the areas of production, direct materials, indirect materials and services, and supply chain automation and process efficiency. Brown is a member of the Institute of Supply Management, represents Intel on the Center for Advanced Purchasing Board, and on the SAP Purchasing Advisory Board. Brown received a bachelor's degree in Finance from Utah State University and joined Intel in 1982.

Daniel Casaletto is vice president of the Digital Enterprise Group and director of Microprocessor Architecture and Planning for Intel Corporation. Previously, Casaletto was the general manager for the Enterprise Microprocessor Division (EMD) leading the development of advanced Enterprise Architecture microprocessors. Product responsibilities included Intel® Xeon™ and Itanium® families. EMD development teams reside across the United States, as well as India. Prior to joining Intel, Casaletto was vice president of the Alpha Development Group at Compaq Computer Corporation. He was responsible for the development and delivery of microprocessors and supporting technologies for entry-level server systems. His organization, made up of hardware and software engineers, developed microprocessors, related chipsets, motherboards, firmware, IC package design and CAD. His group also oversaw microprocessor production, and worked closely with the semiconductor foundries. With more than 25 years of combined service with Compaq and Digital Equipment Corporation, Casaletto has extensive management experience in the engineering field. From 1994 to 1998, Casaletto held the following positions at Digital: vice president, Digital Semiconductor Engineering; vice president; and product line manager for emerging technologies, which included Intel® StrongARM, Intel® 2700G Multimedia Accelerator Reference System, and Intel® 41210 Serial to Parallel PCI Bridge chips; and vice president and product line manager for the Alpha Business Segment. Prior to joining Digital, Casaletto spent three years at RCA designing communication systems for militarized command and control applications. Casaletto received a bachelor's degree and a master's degree in electrical engineering from Northeastern University. He also completed the Yale Executive Management Program in 1992.

David A. Baglee is vice president of the Flash Memory Group for Intel Corporation and the co-executive officer of IM Flash Technologies LLC for Intel Corporation. He is responsible for co-leading a venture between Intel and Micron Technology Inc. to manufacture NAND Memory. Baglee joined Intel in 1987. Previously, Baglee was a Fab 11 plant manager for the Technology and Manufacturing Group. He also served as a plant manager and manufacturing manager for Fab 7. Baglee holds 17 patents in semiconductor memory processing. He is a senior member of the Institute of Electrical and Electronics Engineers Inc. and served on the board of directors for Quality New Mexico. Baglee received his bachelor's degree in electronics in 1975, and his Ph.D in 1978, both from the University of Liverpool.

David O'Meara is vice president, Software and Services Group, and managing director of Intel Corporation's Havok subsidiary. O'Meara is responsible for defining Havok's strategic direction and managing the company to achieve its technical, financial and commercial goals. Previously, O'Meara was CEO of Commerx, a procurement software and services company. He also served on the senior management team at Sterling Commerce, where he served as group vice president for business development. In Europe, O'Meara was director of business development for Unisource NV (Netherlands) and managing director of PostGEM Ltd (Ireland). O'Meara received his bachelor's degree in economics in 1975 from Trinity College, Dublin.

David R. Ditzel is vice president and chief architect for Hybrid Parallel Computing for Intel's Digital Enterprise Group's Architecture and Planning. Ditzel joined Intel in March 2008. He has worked on the design of leading edge computing systems for over 30 years. He was the founding president and CEO of Transmeta Corporation. Prior to his 13 years at Transmeta, he spent 10 years at Sun Microsystems where he held various positions including CTO of the SPARC Technology Business, Director of Sun Labs and Director of Advanced Systems. While at Sun, he started the first collaboration in computer design between the United States and Soviet Union by hiring Soviet Supercomputer designer Boris Babayan and his team at the Moscow Center of SPARC Technology, which was later acquired by Intel. Prior to Sun he spent 10 years at AT&T Bell Labs in Murray Hill, New Jersey where he as the architect for the CRISP microprocessor, one of the first RISC processors, and was a co-author of "The Case for the Reduced Instruction Set Computer". Ditzel has worked on the development of over two dozen computer systems, has published three dozen papers on advanced computer design, and has received seven patents. Ditzel graduated from Iowa State University with a bachelor's degree in electrical engineering, and also a bachelor's degree in computer science, and received a master's degree in electrical engineering and computer science from the University of California at Berkeley in 1979.

Deborah S. Conrad is vice president and general manager of the Corporate Marketing Group. Conrad is responsible for Intel's brand management, product positioning, product launch management and marketing research, as well as sales and integrated marketing communications, advertising, and promotional campaigns designed to reach consumer and business customers worldwide. Prior to leading the Corporate Marketing Group, Conrad created and directed Team Apple and oversaw all aspects of the Intel and Apple relationship since the beginning of the partnership in 2005 through 2008. She was responsible for all aspects of the Intel and Apple business, including sales and revenue, product engineering, software development support and market development. Before her role with Team Apple, Conrad led the Solutions Market Development Group, where she was responsible for worldwide sales development efforts and industry partner programs. She oversaw Intel's extensive direct relationships with CTO/CIOs, industry-specific business development programs and alliances with enterprise ISVs, solution providers and telco service providers. From 1993 to 1999, she was marketing director for Intel's Asia-Pacific Region, responsible for building brand equity and market development efforts throughout China, India, Taiwan, Korea, Southeast Asia, Australia and New Zealand. Conrad joined Intel in 1986 as Microprocessor Group Communications Manager, where she managed press relations, marketing communications, product advertising and related strategic communications programs. From 1990 to 1993, Conrad worked in corporate communications and helped build the worldwide press relations organization, including developing broadcast media, executive speech development and branding programs.

Dianne L. Rudolph is vice president of the Sales and Marketing Group and director of the Corporate Strategy Program for Intel Corporation. Previously, she was the joint program manager for the Structure and Efficiency effort for Intel. Rudolph has held several positions within Intel's finance organization. From 2000 to 2006 she was the controller overseeing Intel Architecture Platform organizations. From 1997 to 2000, she was controller for the Microprocessor Products Group. She also was controller for Corporate Planning from 1996 to 1997. Previously, she held various finance assignments within several business units, including working in Hong Kong for the Sales and Marketing Group. Rudolph joined Intel in 1984. Rudolph received a bachelor's degree in Psychology from the University of California at Berkeley in 1977.

Donald M. Whiteside joined Intel in 1981 and is an appointed Vice President, and Director of Global Public Policy (GPP) within Intel's Legal & Corporate Affairs Group. GPP is responsible for establishing favorable market policies to enable Intel's continued global business success. GPP's policy efforts address legislative, legal and regulatory issues that affect Intel's business operations and the platform products we deliver to the global market. Prior to his appointment as Director of GPP in early 2008, Mr. Whiteside spent the past six years as Vice President of the Corporate Technology Group (CTG) and Director of Technical Policy and Standards. Prior to 2001, Mr. Whiteside held several management positions within Intel, including management of Intel's branded consumer products business, and coordination of Intel's business relationship with the IBM Corporation. Mr. Whiteside was born in New York, N.Y., in 1959. He received a Bachelor of Science degree in Mathematics and Computer Science from Tulane University in 1981. He manages GPP from Intel's facility in Chandler, AZ; where he lives with his wife and four children.

As vice president of the Digital Enterprise Group and general manager of the Embedded and Communications Group, Doug Davis is responsible for Intel’s business in the communications infrastructure and embedded market segments. Davis started his career at Intel as a product engineer in the Military Division, where he went on to manage its product engineering, manufacturing and operations. Following that, he became the operations manager and later general manager for the Embedded Microcomputer Division, and general manager of the Network Processor Division. In 2004 he assumed the general manager role of the Infrastructure Processor Division, which formed from a combination of the Embedded Intel® Architecture silicon business, the Embedded Microcomputer Division and the Network Processor Division. In 2005 Davis became the general manager of the Communications Infrastructure Group, which was recently renamed the Embedded and Communications Group. Davis has a BSEE from New Mexico State University and an MBA from Arizona State University.

Doug Fisher is vice president, Software and Services Group (SSG), and general manager of SSG’s Systems Software Division. He leads a worldwide organization responsible for a broad range of development, enabling, architecture analysis and optimization efforts including pre-boot firmware, operating systems, virtualization, middleware software, graphics, SoftSDV and client/server projections. In addition, Fisher has been named the Intel corporate “Mega Initiative” owner for virtualization. Fisher joined Intel in 1995 and for the first few years managed several new product development and research efforts including projects around remote LAN access, data over VBI, and “Internet in a box” before moving to Intel’s Enterprise Platform Group where he led the Server Management Software development organization for three years. In 1999, Fisher transferred to Intel Online Services as the director of engineering for Europe and moved to England to set up the international engineering organization. In 2000, he was appointed director of worldwide engineering for Intel Online Services. Prior to joining Intel, Fisher worked for 10 years at Hewlett-Packard where he started his career as a software developer on a real-time operating system with his final role as the marketing manager over the OpenView Network Node Manager product line. Fisher holds a bachelor’s degree in electrical engineering from Oregon State University, and a master’s degree in management from Stanford University.

Elenora Yoeli is vice president of the Mobility Group and director of LPIA Microprocessor Development (ULMD) for the Ultra Mobility Group. She is responsible for development and post-silicon engineering of low-power, highly integrated microprocessor products for Mobile Internet Devices. Yoeli is also responsible for development and post-silicon engineering of microprocessors for low-cost IA and system-on-a-chip products used in consumer electronics and DHG. Yoeli oversees design teams located in Austin, Texas and Chandler, Ariz., and Penang, Malaysia. Yoeli has been involved in the ultra mobile design area since 2004, and for the post-silicon engineering area since 2008. Prior to that she managed validation and execution for the Pentium4® family of products and has held key positions in chip design, computer automated design as well as in software engineering where she developed a number of X86 compilers and operating systems. In her EDA role she was responsible for the development of core capabilities. Prior to joining Intel in 1981, Yoeli was a senior programmer at Reiter Software Systems. She was a teaching assistant in the Computer Science and EE Technion faculty until 1979 while studying for her Computer Science graduate degree. She received her bachelor's degree in biophysics from Hebrew University, Jerusalem, in 1972 and her master's degree in biophysics from Technion University in Haifa in 1977. Yoeli is a four-time winner of the Intel Achievement Award.

Elliot is the general manager of the Visual Computing Software Division in Intel's Software and Solutions Group. VCSD delivers programs and software products to enhance the visual computing capabilities of the Intel platforms. This includes software that helps ISVs utilize the innovative capabilities of our platforms for graphics and video utilizing our CPUs and graphics components; and programs that accelerate the time to market for our newest platforms. Previously, Elliot was the general manager of the Developer Relations Division, providing programs and services to assist software companies gain maximum value from Intel platforms. Elliot joined Intel in 1988 and has held management positions in processor and platform architecture, new product planning and application engineering. He holds 15 patents relating to microprocessor system design.

Gadi Singer is vice president of the Mobility Group and general manager, SoC Enabling Group for Intel Corporation. The SoC Enabling Group is responsible for delivering central building blocks and driving Intel's SoC strategy focusing on fast turnaround time and modularity practices. Singer joined Intel in 1983, holding a variety of senior technical and management positions in chip design, software engineering and CAD development. He was appointed vice president in 1999 and chief technical officer of Intel Communications Group in 2004, among other accomplishments. From 2005 through 2007, Singer served as general manager of the Ultra Mobility Group, which is responsible for the development of revolutionary low-power Intel® Architecture solutions and the Mobile Internet Devices. Among his prior roles, Singer was general manager of the Microprocessor Products Group's Design Technology Division, co-general manager of the IA-64 Processor Division and general manager of Enterprise Processors Division. Among Singer's technological contributions is as inventor of the Schematics Formal Verification (SFV) method at Intel, which establishes mathematical equivalence between design logic schematics to substantially reduce schematics functional bugs. Singer was also one of the inventors of Intel's Hardware Description Language (iHDL). Prior to joining Intel, Singer was a software engineer at Elbit Electronics in Israel from 1981 to 1983. Singer received his bachelor's degree in electrical engineering from Technion University, Israel, in 1983. He pursued graduate studies at Technion University from 1986 to 1988.

Gerald Greeve is vice president of the Sales and Marketing Group and a director of the Intel World Ahead Program for Intel Corporation. Previously, Greeve was the general manager of Asia-Pacific. In that role he was responsible for all sales and marketing for APAC including greater China, Southeast Asia, South Asia, Australia, and New Zealand. As a leader of Intel's World Ahead Program, Greeve will focus on driving Intel's emerging markets strategy in emerging markets worldwide. It is an Intel top priority to contribute to the acceleration of ICT adoption in these markets—particularly in areas such as Digital Inclusion, Education, Communications Infrastructure, Health, and Rural programs. In his more than twenty years with Intel, Greeve has held key sales and marketing positions including Worldwide Director of Sales for Intel's Reseller Channel Operation, Worldwide Director of Sales for the Internet Services Sales Group and General Manager of the Branded Math Co-Processor business unit. In addition to his extensive marketing, sales and brand building expertise, he also brings significant international experience to the position having led the team that forged Intel's first joint venture in China in 1985. Greeve is a technology industry veteran. Prior to joining Intel, he worked for a number of US companies involved in areas such as software based network management, silicon wafer substrates and light emitting diodes. He graduated from Santa Clara University with a Bachelor of Arts (Literature, Philosophy and Theology).

Gil G. Frostig is vice president of the Mobility Group and director of Low Power Components and Platforms for the Ultra Mobility Group. Previously, Frostig was the vice president of the Intel Communications Group. In this role Frostig reported to the chief technology officer (CTO) of Intel Communications Group (ICG). Frostig is chartered with delivering One-Generation-Ahead in ICG's technology capabilities and with driving advanced development operations throughout ICG. Prior to his current position, Frostig has held various positions at Intel. From 1997 to 2004 he was co-general manager of the Platform Networking Group. This group was chartered with delivering wired connectivity and storage building blocks for Intel Architecture platforms. First generation of Intel's Wi-Fi solution for Intel® Centrino® Processor Technology was also developed in PNG. From 1994 to 1996, he was engineering manager in charge of silicon development for the Network Infrastructure Operation in Haifa, Israel. He was a liaison engineer for the Haifa development team for the Pentium® OverDrive processor, as well as a project leader for the i860XP RISC processor. Frostig joined Intel in 1983 as a development engineer and team leader for Ethernet networking silicon projects. Frostig received his bachelor's degree in electrical engineering from the Israel Institute of Technology in 1983. He received an Intel Achievement Award in 1991 for the development of the i860XP processor, where he led the circuit design, layout and backend teams.

Gordon Graylish is vice president of Intel Europe, Middle East and Africa and deputy general manager for the region. Graylish's expertise includes the areas of technological development, the disruptive impact of technology and the affect these have on corporate strategies and society. Graylish joined Intel's Canadian operation in 1982 and held a variety of sales and marketing positions there until 1994 when he transferred to Intel's headquarters in Santa Clara. There he held a number of marketing management roles within Intel's geography marketing organization and then in its business marketing unit. In 1998 he became director of Intel Architecture marketing for EMEA based in the United Kingdom. Graylish was responsible for developing and executing strategic marketing plans as Intel moved into many new markets and product areas. From 2002 to 2004 he was responsible for Intel's communications business, driving the sales and marketing of communications silicon products and solutions to wireless handset, network infrastructure and embedded computing customers. In 2004 he transitioned to directing Intel's marketing and technical resources in EMEA before moving to his current role. Prior to Intel, Graylish held a number of positions in systems sales and marketing for Burroughs and IBM. Graylish has a bachelor's degree in Eastern European history from the University of Toronto.

Gregory Bryant is vice president and general manager of the Digital Office Platform Division for Intel's Business Client Group. He is responsible for the development and advancement of Intel's business client platforms globally, including Intel® vPro™ Processor Technology. Bryant has led vPro from its inception through launch and subsequent expansion across desktop and mobile systems. With vPro, Bryant led a shift in the business PC market, creating a unique offering focused on security, manageability and energy efficient performance that fundamentally changed how business PCs are managed. Bryant developed his IT expertise during a decade with Intel's Information Technology Group. Progressing through engineering and operations roles, he culminated his tenure in IT as the director of office computing. Running IT like a business, Bryant was responsible for Intel employees' end-to-end experience with PCs, office applications, client security, messaging, and end-user productivity solutions. He was a key driver of Intel's mobile computing initiative, remote management implementation and global platform deployment strategies. Bryant joined Intel in 1992 as an engineer in Intel Folsom Engineering Services. He received his bachelor of science degree in electrical engineering from the University of Kansas in 1991 and his master of science degree in systems management from Golden Gate University in 1996. He currently serves on the board of directors of StarSoftComm, based in Beijing.

Gregory R. Pearson is vice president of the Sales and Marketing Group and general manager of World Wide Sales and Operations for Intel Corporation. Prior to 2008, Pearson ran Intel's geography sales and marketing organizations serving as president of Intel America’s and Intel Japan. Pearson has held numerous positions with Intel's sales organization since 1983 directing world wide teams and living abroad in Europe and Japan. Prior to his most recent geography posts, he directed the worldwide sales organization that sold communications products to wireless handset, network infrastructure and embedded computing customers. He managed a sales and marketing team from 1999 to 2000 that focused on Internet service providers. Prior to that, he managed Intel's northern and central Europe sales and marketing organization from 1997 to 1999. Pearson has also managed Intel's worldwide Compaq Computer Corporation sales account, served as a field sales engineer and worked with communications and embedded computing customers. Pearson received a bachelor's degree in Business, with a concentration on Computers and Microelectronics, from the University of Wisconsin in 1983.

Gulsher Grewal is vice president of the Technology and Manufacturing Group and plant manager of Intel Fab D1DR in Hillsboro, Ore. He is responsible for ramping Intel's newest 300mm fab process technologies to high-volume manufacturing. He is responsible for all aspects of manufacturing operations, including environmental health and safety, quality, output and cost. Previously Grewal was responsible for managing Intel's largest overseas site, Intel Malaysia, which includes four assembly/test factories, a system manufacturing factory, and design, marketing, and finance/enterprise services groups. Grewal joined Intel in 1983 as an etch process engineer at Fab 5 in Aloha, Ore. He subsequently held positions managing the Process Equipment Development Group in Santa Clara, Calif, and later as the commodity factory manager for assembly/test manufacturing in Penang, Malaysia. In 1999 he was named factory manager at Intel Costa Rica. In 2000 Grewal returned to Malaysia as site manager. Grewal graduated from the Thapar Institute of Engineering in India in 1979 with a bachelor's degree in electrical engineering. He graduated from the University of Utah in 1981 with a master's degree in electrical engineering.

Jacklyn A. Sturm is vice president of Finance and Enterprise Services and controller for the Technology and Manufacturing Group at Intel Corporation. She oversees the financial management and controls for the company's technology development, manufacturing and capital investments. Sturm has held a variety of financial management positions since joining the company in 1993. Previously, she was controller for several product divisions as well as Intel Capital and the New Business Group. Prior to joining Intel, she worked for Hewlett-Packard, Ridge Computer and Apple Computer. Sturm received an MBA from the University of Santa Clara in 1981 and a bachelor's degree in finance from San Jose State University in 1979.

James A. Johnson is a Vice President of the Digital Enterprise Group and General Manager of the Visual Computing Group for Intel Corporation. In this role, Johnson is responsible for Intel’s strategies, product roadmaps, product development and marketing plans for Intel’s processor roadmap targetting discrete graphics and floating point acceleration applications utilizing high numbers of Intel Architecture cores. Prior to his current position, Johnson was Vice President of the Intel Mobility group and General Manager of Intel’s Wireless Networking and Cellular groups. In these capacities Johnson delivered Wifi for Intel® Centrino® Processor technology and drove the sale of our Cellular business to another company. In these capacities, he was responsible for the architecture, design, development and marketing. Throughout his time at Intel, he has held various engineering and management assignments in the Technology and Manufacturing Group and the Networking and Communications Group. Johnson was on the team that launched Intel into the networking business. He was responsible for the initial production of networking products and manufacturing ramp at sites in the United States and Puerto Rico. Other positions held include plant manager for Intel’s PC and server manufacturing plants worldwide and General Manager for three different networking and communications businesses. Johnson joined Intel in 1984 after receiving his bachelor’s degree with honors in industrial engineering from Oregon State University in 1984. Johnson sits on the advisory board for Oregon State University’s College of Engineering.

James G. Campbell is vice president of Finance and Enterprise Services and corporate controller. He is responsible for global accounting, financial services and financial reporting. Campbell also leads and manages the international controllers responsible for financial services, statutory compliance and business support for the Technology and Manufacturing Group and Sales and Marketing Group for all locations outside the United States. Campbell joined Intel in 1981. Previously, Campbell was based in Europe, responsible for Intel's international finance operations. He has also been manager of Intel's Financial Information Systems, responsible for designing, developing and implementing Intel's internally used financial applications. In addition, he has served as Asia regional audit manager, Microprocessor Group Controller and European controller. Before joining Intel, Campbell worked for Itel Corporation. Campbell received his bachelor's degree in business and accounting from California State University, Hayward. He holds a CPA license and is a member of the Financial Executives International Committee on Corporate Reporting, the FASB Emerging Issues Task Force (EITF), the PCAOB Standing Advisory Group (Emeritus) and the Portland State University Accounting Advisory Board.

James R. OHara is vice president of the Technology Manufacturing Group and general manager of Intel Corporation's Ireland Operations and plant manager of Fab 10/14 in Leixlip, Ireland. OHara joined Intel in 1991, and has held several manufacturing management positions, including plant manager for Fab10 and plant manager for Intel's Ireland Fab Operations. Prior to joining Intel, OHara worked for Digital Equipment Corporation for 17 years, during which he held several general management positions in Ireland and the United States. OHara is a member of the governing board for the Irish Business and Employers Confederation and chairs the Information Communications and Technology sector. In addition, he is a director of the American Chamber of Commerce in Ireland.

Janice F. Wilkins is vice president of Finance and Enterprise Services and director of Internal Audit for Intel Corporation. Since 1995, she has managed a worldwide staff of internal auditors who provide assurance to the board of directors' audit committee and Intel's management team regarding the company's system of internal controls. She reports directly to the board of directors' audit committee. Since joining Intel in 1980, Wilkins has held several finance controller positions at the corporate and business unit level. She also managed the company's U.S. compensation and benefits organization. Previously, Wilkins worked for several public and private companies in the electronic, oil and gas, mineral, shipping and real estate industries. Wilkins earned an MBA in accounting from Golden Gate University in San Francisco in 1987 and her bachelor's degree in accounting from Xavier University in New Orleans in 1967.

Jeff McCrea is vice president and general manager of the Consumer PC Platform Group. He is responsible for delivering Intel's consumer PC products including definition, development and marketing of Intel's desktop platform solutions. McCrea has held several sales and marketing management positions since joining Intel in 1991. From 2004 through 2006, he served as co-president for Intel Americas Inc., where he was responsible for all sales and marketing activities in North America and South America. In 2003, he was responsible for coordinating Intel's worldwide sales and marketing efforts focused on re-energizing the sales of client PCs to businesses and on aligning the industry behind driving client PC replacements. From 1999-2002, he served as vice president and director of desktop platform marketing, responsible for worldwide product marketing and applications engineering for the desktop products including CPUs, chipsets and software. Prior to joining Intel, McCrea was an engineering consultant for Ebasco Services Inc. McCrea earned an MBA from the University of Michigan in 1991. He received a bachelor's degree in electrical engineering from Duke University in 1987.

John D. Barton is vice president, Digital Enterprise Group, and general manager, Platform Validation Engineering. He is responsible for an organization that performs post silicon validation/verification for Intel platforms. Barton's responsibilities include the verification of logically correct operation of microprocessors and chipsets, verification of platform electrical interconnects, software compatibility and security. Barton's organization also works directly with customers and third parties to ensure key products and technologies ramp with high quality. Barton joined Intel in 1982 as a software engineer in the Development Systems Operation. He later managed various hardware and software tools for Intel's X86 and 80960 processor families. Barton subsequently managed customer support for Intel's Supercomputer Systems Operation before joining the Intel® Pentium®Pro team as validation manager. Barton graduated from Oregon State University in 1980 with a bachelor's degree in computer science.

John Pemberton is vice president of the Technology and Manufacturing Group and Fab 32/22 plant manager in Chandler, Ariz. Pemberton joined Intel in 1982 and is responsible for all aspects of Fab 32, Intel's newest 45nm, 300mm factory, which included the construction, start-up and ramp. In addition, Pemberton is responsible for Fab 22 running 130nm 200mm logic technology. Prior to moving to Arizona, Pemberton was the Fab 11 factory manager, a 200mm logic/flash factory in Rio Rancho, NM, and has held multiple positions throughout his career including manufacturing manager, process engineering manager and other various engineering, operational and engineering management roles in Arizona and New Mexico. Pemberton received a bachelor's degree in engineering from Iowa State University in 1982.

Jonathan Khazam is vice president of the Software and Services Group and general manager of the Manageability and Middleware Division at Intel Corporation. He leads a worldwide organization responsible for the development of value-add manageability-related software and middleware products, including the Intel XML Software Suite. Khazam joined Intel in 1991 as a product manager in Intel's Mobile Computing Group, responsible for mobile microprocessor product marketing, design wins and product planning. He moved to the Pentium Processor Division in 1994 where, as Strategic and Technical Marketing Manager, he led processor roadmap planning and was a key champion and driver of MMX™ technology. He also led the first-ever public release of Intel microprocessor errata and stepping information. In 1996, Khazam became the marketing director for graphics in Intel's Microprocessor Products Group, working with internal teams and external partners on graphics APIs, instruction set extensions and technology positioning. In 1999, he formed a new division to lead the development and commercialization of Intel software development tools, including compilers, performance analysis tools, performance libraries and binary translation. Prior to joining Intel, Khazam held marketing and development positions at EIP Microwave and Hewlett-Packard. Khazam has an MBA from the University of California at Berkeley Haas School of Business and a bachelor's degree in electrical engineering from Cornell University. Khazam serves on the board of the Eclipse Foundation on behalf of Intel. He is an independent board director at Integrated Silicon Solution, Inc.

Joseph D. Schutz is vice president of the Corporate Technology Group and director of Microprocessor Technology Lab for Intel Corporation. Schutz is responsible for research for future microprocessors. Schutz joined Intel in August 1981. He was a principle designer for the world's first CMOS DRAM, and led the design of the 256 Kbit CMOS DRAM. Schutz consulted on the design of the original i386™ microprocessor. He co-managed the development of an i386™ microprocessor and managed the development of an i486™ processor. Subsequently, he was director of Microprocessor Design in the Portland Technology Development Group and co-managed four microprocessor designs within the Pentium® processor and Pentium® II processor families. He co-managed the Prescott microprocessor and managed the Cedar Mill microprocessor. Before joining Intel, Schutz designed custom integrated circuits. He holds seven patents. Schutz earned his bachelor's degree in Electrical Engineering from the University of Utah.

Joshua M. Walden is vice president of the Technology and Manufacturing Group and general manager of Fab/Sort Manufacturing for Intel Corporation. Walden joined Intel in 1983 as a process engineer working in Santa Clara, California. In 1988 he moved to New Mexico where he was part of the start-up/transfer and production ramp of four Intel wafer fabrication facilities, in 1999 he moved to Ireland where he assisted in the management of the 200 mm fabrication facility prior to taking over the Fab 24 project, and in 2006 he became the general manager of Assembly/Test before taking over Fab/Sort Manufacturing in 2008. He received his bachelor's degree in chemical engineering from the University of Florida in 1982.

Kaizad Mistry is vice president of the Technology and Manufacturing Group, and director of Logic Technology Integration. He works in Intel's Logic Technology Development group, where he is responsible for directing process development activities for Intel's logic technologies. He manages the development of Intel's 45nm logic technology, the world's first to feature high-k plus metal gate transistors. Mistry joined Intel in 1998. From 2001 to 2003, Mistry was the device group leader for Intel's 90nm logic technology and played a key role in the development of strained silicon transistors which was first introduced by Intel at the 90nm node. In 2003, Mistry received an Intel Achievement Award for his work on 90nm strained silicon transistors. He has authored or co-authored more than 70 journal and conference papers and holds 15 patents. Prior to joining Intel, Mistry managed the device physics group for the semiconductor technology division at Digital Equipment Corp. He joined DEC in 1986 and worked on the development of successive process technology generations from 1.5um CMOS through 0.25um CMOS. Mistry graduated from the Indian Institute of Technology, Mumbai, in 1984 with a bachelor's degree in electrical engineering. He graduated from the University of Southern California in 1986 with a master's degree in electrical engineering.

Kazumasa Yoshida is vice president of the Sales and Marketing Group and president of Intel K.K. (Japan). He is responsible for Intel's sales and marketing business operations in Japan. Yoshida joined Intel in 1984. Previously, Yoshida worked as general manager of the Intel Architecture Business and the Communications Product Group in Japan, and served as marketing manager for the Consumer Desktop Product Division. He joined Intel in 1984 as a recent college graduate, working first in microcomputing product marketing. Yoshida received his bachelor's degree in sociology from Western State College in Colorado in 1982.

Kirk Skaugen is vice president of the Digital Enterprise Group and general manager of the Server Platforms Group for Intel Corporation. In this role, Skaugen has P&L responsibility for Intel's server, storage and workstation platforms, including the Intel® Xeon® and Intel® Itanium® processors and related platform silicon, software and motherboards. Previously, Skaugen served in Asia as general manager of Intel Asia Pacific Solutions Group, responsible for the development and deployment of optimized software and related solutions across Intel's client and server platform architectures. He also managed Intel's relationships with end-users, independent software vendors, OS vendors, system integrators, and service providers across Asia-Pacific. Prior to his time in Asia, Skaugen was general manager of the Enterprise Platforms & Services Division (EPSD) with P&L responsibility for Intel’s server board and system business. Skaugen spent seven years in a variety of positions within Intel's sales and marketing organization, including microprocessor product management, distribution business management, and Intel's enterprise and desktop global account management for Compaq Computer Corporation. Skaugen received his bachelor's degree in electrical engineering from Purdue University, with a further concentration in business. He joined Intel in 1992. He lives in Portland, Oregon with his wife and son.

Kostas Katsohirakis is vice president of the Software and Services Group (SSG) and director of Strategic Business Development. In this role, he oversees growth initiatives in software and services on a worldwide basis, including key SSG focus areas such as China, Russia and Argentina. Katsohirakis focuses on growing this business through activities such as acquisitions, equity investments and IP licensing agreements in order to enhance the company's software and services product portfolio and software ecosystem influence. Since joining Intel in 1995, Katsohirakis advanced through several business development and M&A management positions within Intel Capital, Intel's strategic investment organization. Prior to his current role, he was assistant treasurer in Intel Capital. He was the lead negotiator on the company's acquisitions and divestitures, managing global teams responsible for identifying, evaluating and negotiating transactions in Intel's networking and communications businesses. Katsohirakis oversaw dozens of acquisitions and divestitures for Intel between 1997 and 2005. Prior to joining Intel, Katsohirakis held senior engineering positions at HP and Legent Corp. He also served as an investment manager at Morgan Stanley. Katsohirakis earned his bachelor's degree in computer science from the University of Utah in 1985 and his MBA from Duke University's Fuqua School of Business in 1993.

Kumud Srinivasan is vice president of Finance and Enterprise Services and general manager of IT Core Systems Engineering. In this role, she oversees the development of Intel's IT core applications and solutions, such as networks, PCs and servers, security and manageability, engineering and office computing, enterprise resource planning and collaboration, and data management and warehouse. Since joining Intel in 1987, Srinivasan advanced through several business and information systems positions within Intel's manufacturing organization. Most recently, she was director of Automation, responsible for the development of Intel's automation capabilities across Intel's global factory network. Srinivasan served as a programmer/analyst at Chevron Corp. prior to joining Intel. Srinivasan received her bachelor's degree in economics from Calcutta University in 1981 and her master's degree in information and library science from Syracuse University in 1984. In addition, she has completed doctoral coursework in information science at University of California, Berkeley.

Laura G. Crone is the vice president of Sales and Marketing and director of Global Accounts – Sun Microsystems. She is responsible for all aspects of Intel’s relationship with Sun Microsystems. Prior to leading the Sun Global Account team, Crone was vice president of Flash Memory Group and director of Flash Memory Operations, where she was responsible for managing and continuously improving the supply chain for the group. This included such functions as demand and revenue forecasting, inventory management and pricing strategy. Previously, Crone held a variety of positions in Sales and Marketing Group, including director of worldwide customer satisfactions, director of operations in the ASMO region and manager of Americas Geography Marketing. She has also been a technical sales engineer, field sales engineer and district sales manager. Crone received her bachelor’s degree in computer science from Chico State University in 1983. She joined Intel as a recent college graduate in 1984.

(Sophia) Lee Fang Chew is vice president of the Sales and Marketing Group. She is currently the general manager for Services in Worldwide Sales & Operations Group. Prior to assuming this position, Sophia Chew was the vice president and general manager for Intel's worldwide Reseller Channel Operation, and Strategic Planning in Channel Platform Group. She has also been director of the APAC reseller channel operation, responsible for the distribution channel business in the Asia-Pacific region. Chew has also served as a channel marketing manager, a finance controller and has held other management positions within Intel's Sales and Marketing Group. Chew received her bachelor's degree in accounting from National University of Singapore. Chew is currently based in Oregon, USA.

Leslie S. Culbertson is vice president and director of Finance for Intel Corporation. She is responsible for corporate finance, tax, licensing and customs, all operational finance and accounting and control functions. Culbertson joined Intel in 1979 as the Oregon site accounting manager. Since that time, she has held many different controller positions, including a group controller. She was the vice president and co-director for Intel’s Materials Organization from 1998 to mid-2000. In this position, she was responsible for direct and indirect procurement of materials, including silicon, boards/systems materials and all corporate purchasing. In 2000, Culbertson moved into the position of vice president and general manager for Systems Manufacturing. In this role, she was responsible for the entire supply chain for board and system level products at Intel. This included an outsourcing organization, manufacturing facilities in four locations, a materials procurement organization, technology development for boards and systems, and the post-sales support group for Intel. She also worked as a business unit general manager. Prior to Intel, Culbertson worked at British Petroleum/Standard Oil of Ohio as the cost manager for the Prudoe Bay Project in Alaska. Culbertson received her bachelor’s degree from Lewis & Clark College in 1971.

Louis Burns is responsible for leading Intel Corporation’s initiative to help transform global health care by connecting people and information. Prior to assuming this role, Burns was general manager of the Desktop Platforms Group (DPG), responsible for the design, development and market development of Intel’s desktop platform solutions, including processors, chipsets, motherboards, software and services. Previously, Burns was vice president and general manager, Platform Components Group, the primary producer of core logic and integrated graphics chipsets for Intel. He also served as vice president and director of Intel’s Information Technology group for 4 years, supplying computing capabilities to Intel sites worldwide. Burns also spent 12 years in Intel’s sales, marketing and applications groups. Burns was appointed an Intel vice president in 1996 and elected corporate vice president in 1997.

Maxine Fassberg is vice president of the Technology and Manufacturing Group for Intel Corporation, Fab 28 plant manager, and Intel Israel General Manager. She is responsible for manufacturing operations, including planning, product output and cost effectiveness, for Intel's manufacturing facility in Qiryat Gat, Israel. She joined Intel in 1983. Fassberg has held numerous positions at Intel, including as lithography engineer in the Fab 8 startup in 1983, and engineering manager since the inception of Fab 18 in December 1995. As an engineer from 1991 to 1992 she was part of Portland Technology Development where she was awarded a patent for the original Polyimide process. From 2000 to 2004 she was the Fab 18 factory manager, along with Alex Kornhauser. She was instrumental in the Fab 18 start-up, ramp and the factory winning the Intel Quality Award in 2004. She has also received two Intel Achievement Awards in connection with inter-die electric material problem resolution. Fassberg received a master's degree in Applied Chemistry from Hebrew University of Jerusalem in 1978. She began working as a teacher prior to coming to Intel, first at a high school teaching physics and chemistry, then at Hebrew University training teachers in chemistry.

Melton Bost is vice president of the Technology and Manufacturing Group and director of Yield Technology for Intel Corporation. He is responsible for driving the development of next-generation microprocessor process technologies that are capable of producing world-class yields. He is also responsible for the Sort/Test organization that supports the Technology Development Group. Bost joined Intel in 1987, working as an integration engineer in the Portland Technology Development group. He has held various technical and management positions in the PTD integration and yield organizations. In his development roles, Bost has contributed to the early development through the high-volume ramp of the past 11 microprocessor process technologies, beginning with process P448. In his most recent assignment, Bost was responsible for guiding the yield learning for the company's recently ramped 32nm technology. Bost received a bachelor's degree in mechanical engineering from Duke University in 1978. He received a master's in materials science from Stanford University in 1979. In 1987 he received a Ph.D. in electrical engineering from Colorado State University. He has been awarded four patents and three Intel Achievement Awards.

Michael C. Mayberry is vice president of the Technology and Manufacturing Group and director of Components Research for Intel Corporation. He is responsible for ongoing research to enable future process options for Intel's technology development organizations. Since joining Intel in 1984 as a process integration engineer, Mayberry has held a variety of positions. As part of the California Technology Development team, he developed EPROM, flash and logic wafer fabrication processes. In 1994 he moved to Sort Test Technology Development, most recently as director, responsible for roadmaps and development of test processes for Intel microprocessors. In 2005, he moved to Components Research. Mayberry received his Ph.D. in physical chemistry from the University of California, Berkeley in 1983 and his bachelor’s degree in chemistry and mathematics from Midland College in 1978.

Mostafa Aghazadeh is vice president, Technology and Manufacturing Group, and director of Chandler Assembly Technology Development. He is responsible for development and deployment of the CPU packaging and assembly technologies and development of packaging materials suppliers. He has held a variety of technical and management positions at Intel, including, most recently, director of the Platform, Materials and Enabling group where he was responsible for packaging technology and enabling collateral development and transfer to high-volume manufacturing for IA products. Previously, Aghazadeh was responsible for packaging materials technology development and suppliers ramp. Aghazadeh joined Intel in 1984. From then until 1992 he served as a thermal engineer responsible for thermal design, modeling and characterization of all Intel packages, including the 286, 386, 486 and Pentium Processors. He holds six U.S. patents in electronic packaging. Aghazadeh received his bachelor's degree in mechanical engineering from the University of Tennessee in 1980 and a master's degree in mechanical engineering from the Georgia Institute of Technology in 1982.

Nanci S. Palmintere is vice president of Finance and Enterprise Services and director of Global Tax and Trade for Intel Corporation. She directs the worldwide organization responsible for all tax, export licensing, and customs planning and compliance. Palmintere is also responsible for all negotiations with the IRS, state and local tax authorities, and foreign tax authorities. She is responsible for transfer pricing, including advance pricing agreements, tax planning for mergers and acquisitions, and tax planning for employee benefits including creation of Intel's pension and profit sharing plans. She also is responsible for negotiating with governments for tax incentives associated with site selection. An internationally recognized expert on taxation, Palmintere has testified before the U.S. Senate and state legislatures on a variety of tax policies and proposed legislation, has received National Commendation from the Commissioner of the Internal Revenue Service on audit simplification, and is a frequent speaker on audit, tax administration, and employee benefits issues. Palmintere joined Intel in 1979 as a tax attorney. She has more than 25 years of experience in tax, licensing and customs. Her prior assignments at Intel include director of Tax, Licensing and Customs, director of Tax, and Director of Tax Administration. Prior to her employment at Intel, Palmintere held positions at the law firm of Ruffo, Ferrari and McNeil (now Pillsbury Winthrop), and in the tax practice of Coopers and Lybrand (now PriceWaterhouseCoopers). Palmintere is currently vice chair of the Tax Executive Institute's National IRS Administrative Affairs Committee, a member of the State Bar Taxation Section Executive Committee, chairwoman of the MAPI Tax Council III, and on the editorial board of CCH Journal of Tax Practice and Procedure. Additionally, Palmintere is a founding director of Silicon Valley Employee Benefits and Compensation Association, a member of the State Bar of California, the ABA, Financial Executive Institutes Committee on Taxation, and a member of the Silicon Valley Tax Directors group. Palmintere received a Juris Doctor degree from Santa Clara University Law School and a bachelor's degree from Cornell University.

Nancy Bhagat is vice president of the Sales and Marketing Group and director of integrated marketing for Intel Corporation. She is responsible for all advertising, global media, corporate events, Internet marketing, marketing communications, agency management and operations worldwide. Prior to joining Intel in September 2005, Bhagat was at Macromedia, where she was chief marketing officer. She was responsible for developing a world-class marketing organization. Prior to that, Bhagat was senior vice president of Global Marketing for Computer Associates International where she was charged with driving the branding and repositioning of the company. In addition to her career on the corporate marketing side, Bhagat spent several years in the advertising world in senior positions at agencies such as Schell/Mullaney and J. Walter Thompson. Bhagat holds a bachelor's degree in Business Administration and Political Science from Gettysburg College.

Nasser Bozorg-Grayeli is vice president of the Technology and Manufacturing Group and director of Assembly Technology Development. Since 1999, he has been responsible for the company's packaging, assembly process, and materials and enabling technology development. Grayeli has held numerous technical and management positions at Intel. As manager of Materials/Supplier Technology Development from 1996 to 1999, he led a team that worked with Intel's suppliers to improve technology development methodology and cycle time, increase yields and product quality, and reduce packaging costs. From 1992 to 1996, he managed the development of Intel's tape carrier package technology, including the first six-inch wafer bump capability. Grayeli has also held positions where he was responsible for integrating back-end fab processes with assembly processes and developing several interconnect and mounting technologies. Grayeli joined Intel in 1983. Grayeli participates in several industry associations. He is currently a member of the Board of Directors of National Electronic Manufacturing Initiative (NEMI). Grayeli has been a mentor and Technology Advisory Board member in the Semiconductor Research Corporation (SRC) program and was a Semiconductor Manufacturing Technology (SEMATECH) assembly team member. Prior to joining Intel, Grayeli was a post-doctoral research affiliate at Stanford University. While there, he served on a cross-disciplinary research team in materials engineering, electrical engineering and applied physics, which developed non-destructive evaluation methods for use in various industries. He also worked at Parchin Chemical Factories as a communication engineer. Grayeli received his doctorate in 1981 and master's degree in 1977 in Materials Science and Engineering from Stanford University. He received a bachelor's degree in Electrical Engineering in 1973 from Science and Technology of Iran.

Navin Shenoy is vice president of the Sales and Marketing Group and general manager for Intel Corporation in Asia-Pacific. He is responsible for all sales, marketing and enabling of Intel products in the region, excluding Japan and China. Prior to assuming his current role, Shenoy was for 3 years the technical assistant to Paul Otellini, Intel's president and CEO. In this role he assisted Otellini in the development and implementation of Intel's long-term corporate strategy and the daily management of Intel's global business. Shenoy joined Intel in 1995 and spent several years in a range of roles within Intel's sales and marketing organization, including: regional solutions manager for Southeast Asia, a Singapore-based role in which he was responsible for end-user, ISV and service provider engagements; Northern California district manager for Intel Online Services; and account manager for Toshiba America. Shenoy graduated from the University of Michigan with a bachelor's degree in electrical engineering and attended the Stanford Executive Program.

Neil R. Tunmore is vice president of the Technology and Manufacturing Group and director of Corporate Services. He is responsible for environmental health and safety, security and all of Intel's facilities worldwide including construction, building services, maintenance and real estate strategy. Previously he served as the human resources director for the Technology Manufacturing Group. Tunmore joined Intel in 1981 in the United Kingdom. He has held a variety of positions in Europe in business planning and finance. In 1998 he was named controller of Intel's Europe, Middle East and Africa region. In 2000, he relocated to the United States and served in Intel Human Resources as the stock manager and then director of the Employee Services group.

Ogden M. Reid is vice president of Finance and Enterprise Services and director of Compensation and Benefits for Intel Corporation. In this role, Reid manages base and variable pay systems, stock programs, executive compensation and employee benefits offerings. Previously, he has managed HR Legal Services, Business Group HR, Intel University, Diversity, Immigration and HR M&A. Reid joined Intel in 1994 as an attorney covering employment law. Previously, Reid worked for the Rodey Law Firm in Albuquerque, N.M. for eight years, where he was a shareholder and director. He handled commercial litigation, including employment law, contracts, shareholder disputes and antitrust. Reid graduated from Yale University with a bachelor's degree in history in 1983. He received his law degree with honors from Duke University in 1986.

Patricia A. McDonald is vice president, Technology and Manufacturing Group and plant manager of Fab 20 in Oregon. She is responsible for all aspects of Fab 20 operations, including environmental health and safety performance, staffing, people development, finance, organizational and strategic direction. In her previous positions she served as interim factory manager at Fab 22 where she helped lead Intel’s fastest-ever 200mm high-volume manufacturing factory start-up, and as Fab 22 Yield Engineering Department manager. She also served in various roles at Intel fabs 12 and 7, including as Thin Films Process Engineering Department manager, operations manager and Litho Operations Group manager. McDonald joined Intel as a summer intern in 1986. She earned a bachelor’s degree in chemical engineering from Oregon State University in 1986.

Patricia N. Perry is vice president of the Digital Health Group, Director of Product Delivery at Intel Corporation. She is responsible for customer and in-home patient deployment of purpose-built telehealth solutions, including regulated medical devices. In addition, she is chartered with product distribution, supply chain management and manufacturing of Intel's Digital Health products and solutions. Prior to Director of Product Delivery, Perry was General Manager of Healthcare Information Technology. Perry joined Intel in 1983. Previously, Perry has served in a variety of management positions in marketing, programming and planning. Perry also held several positions in the Sales and Marking Group, including director of Customer Business Solutions, manager of Internet Marketing and eCommerce applications, manager of worldwide training and field productivity and corporate accounts manager. Prior to joining Intel, Perry was a product marketing engineer in the Linear Integrated Circuits division at Fairchild Semiconductor. Perry received her bachelor's degree in economics from the University of Wisconsin in 1974. She received her master's degree from Santa Clara University in 1981.

Paul Bergevin is responsible for leading communications strategies at Intel Corporation, including all product and corporate communications worldwide. The Global Communications Group manages relations with industry analysts and the international news media, executing the company's product launches and communicating innovation milestones. GCG also is responsible for corporate messaging, executive communications, corporate reputation and issues and policy communications. Bergevin has more than 20 years of experience in technology PR and marketing, having served in corporate and agency environments. Before Intel, Bergevin was president and CEO of Citigate Cunningham, a technology PR specialist firm, and earlier launched the global technology practice of Edelman. He has counseled a diverse mix of leading companies including Ericsson, Sybase, Sun Microsystems, Apple, PeopleSoft and Rambus. Bergevin's experience includes serving as director of PR for IBM's PC business during which he led the PR launches of the ThinkPad and Aptiva brands. Before IBM, Bergevin worked in national and state politics, and for 2 years was a news reporter at Foster's Daily Democrat in Dover, N.H. Bergevin serves as marketing advisor to the national board of Court Appointed Special Advocates (CASA), which provides vital services to neglected children through a network of trained community volunteers. He is also on the board of advisors of Consumer Direct, a startup that helps individuals improve their creditworthiness. Bergevin earned his bachelor's degree, magna cum laude, from Brown University, and his master's in international business diplomacy from the Georgetown School of Foreign Service.

Peng Bai is vice president of the Technology and Manufacturing Group and director of the Derivative Logic Technology Development at Intel Corporation. He is responsible for managing derivative logic technology development and is the D1C plant manager. Bai joined Intel in 1991. Previously, Bai held several positions in the Portland Technology Development. He was the program manager for Intel's latest 65nm silicon process technology development, and previously served as a program manager, yield manager, process integration group leader and process integration engineer in generations of technology development. Bai has 25 published papers in science and engineering journals and holds two U.S. patents. He has four Intel Achievement Awards. Bai received his bachelor's degree in physics from the University of Bucharest in Romania in 1985. He received his Ph.D. from Rensselaer Polytechnic Institute in New York in 1991.

Peter Charvat is vice president of the Technology and Manufacturing Group and director of PTD Patterning and Manufacturing for Intel Corporation. Charvat is responsible for the development and transfer of next-generation silicon patterning technologies that will produce future Intel microprocessors. He is also responsible for the development group's manufacturing arm. Charvat joined Intel in 1988, working as a process engineer in the Portland Technology Development group. He has held various technical and management positions in both etch and lithography. In his development roles, Charvat has contributed to the past eight process technologies, from early development through high-volume ramp. In his most recent assignment, Charvat was responsible for patterning development of the company’s recently ramped 65nm technology. Charvat received a bachelor's degree in physics from Reed College in 1983. He received a Ph.D. in materials science from Cornell University in 1988. He has been awarded eight patents and three Intel Achievement Awards.

Peter Cleveland is vice president of Legal and Corporate Affairs and director of Global Public Policy (GPP). Supervising a team of roughly 70 attorneys and policy professionals worldwide, Cleveland is resident in Intel's Washington, D.C., office and serves as Intel's liaison to the U.S. Congress, Executive Branch and other U.S. governmental agencies. He also represents Intel on the boards of various trade associations and related organizations. GPP is responsible for establishing favorable legal, regulatory, statutory and market rules and policies to enable Intel's continued global business success. Cleveland joined Intel in November, 2008, from the office of California Senator Dianne Feinstein, where he served as chief of staff since 2006. Prior to his role overseeing Senator Feinstein's Washington office, Cleveland was her legislative director, from 2004 to 2006. Previously, he advised a Member of the Senate Finance and Foreign Relations committees and served as a corporate and government relations attorney for a leading international law firm. Cleveland received his law degree from Georgetown University in 1997 and an undergraduate degree from Columbia University in 1987. He is a member of the New York and the District of Columbia Bars and the Council on Foreign Relations.

Prasad L. Rampalli is the vice president of the Digital Enterprise Group and director of End-User Platform Integration for Intel Corporation. Rampalli is a 25 year Intel veteran and has led significant transformational roles in Manufacturing, Information technology and Platform Business Units. In his current assignment (2005 - ) Rampalli is leading an End user R&D function responsible for driving usage model innovation into enterprise platforms and rapid integration into IT /End user environments. Rampalli plays a strategic role as the Enterprise CIO "proxy" for the Digital Enterprise group (DEG) which accounts for greater than 50% of Intel's revenue. His team is leading the charge on game changing enterprise strategies focused on DEG's growth. These include stateless computing/software as a service (SaaS) models, service delivery based appliance and business models in small and medium enterprises (SME) and Data Center virtualization. These emerging usages entail partnering extensively with select end users, software ISVs and systems integrators. Prior to this, Rampalli spent twelve years in Intel's Information technology group and lead most of IT's major technology transitions including client/server standardization on windows, ERP (SAP) worldwide rollout, 100% eCorp build out and Service oriented architectures (SOA). Rampalli was the Chief architect and Vice President responsible for application development and engineering functions across a 3000 person technical team in 25+ sites worldwide. He was Intel's executive partner for joint solutions development with leading ISVs (SAP, MSFT, and TIBCO). Rampalli joined Intel in 1983 and spent seven years in TMG leading the deployment and standardization of Intel's shop floor control and equipment performance management system across Intel's factories. Rampalli was named to CIO Magazine's Top 100 Honoree List in 2001 and 2002. He is on the advisory board of UC Davis Graduate School of business and a founder of IT "center of excellence" at UCD. Rampalli has received three Intel Achievement Awards. Rampalli received a master's degree in Industrial Engineering and Operations Research from the University of Texas at Arlington. He received a bachelor's degree in Mechanical Engineering from the Indian Institute of Technology in Kanpur, India.

Kevin Sellers is vice president, Finance and Enterprise Services and director of Investor Relations. He is responsible for managing the relationship among Intel and its shareholder and financial analyst audiences worldwide. Prior to being named director of Investor Relations in 2007, Sellers was director of corporate brand strategy where he was responsible for developing the global Intel brand strategy and certain corporate design elements. In this role he also managed the corporate market research team and the technology marketing team. Sellers also served as director of marketing and operations director for Intel's sales and marketing organization in Japan. He has held a number of other operations and finance related posts during his Intel career. Sellers joined Intel in 1991 as a financial analyst responsible for budgets and strategic analysis for factory automation, assembly and test, and site selection. He received his bachelor's degree in finance in 1989 and his MBA in 1991, both from Brigham Young University. Sellers is a member of the National Investor Relations Institute.

Raheel Shah is a vice president of Intel Capital, Intel's strategic investment organization, and director for mergers and acquisitions (M&A) for Intel. Shah is responsible for Intel M&A activities and post merger integration, as well as overseeing Intel Mobility Group business development activities. Shah joined Intel in 2000 as a director in the Treasury Department focused on mergers and acquisitions. He was promoted to the position of assistant treasurer for M&A in 2005 and appointed managing director in 2006. Prior to joining Intel, Shah was part of the corporate development group at Lucent Technologies Inc. from 1997 to 2000. Before joining Lucent, he worked at BDM International Inc. as a member of the corporate finance group focused on capital markets and corporate development activities. He received a master's degree in business administration from the American University in Washington, D.C.

Dr. Rama K. Shukla is vice president of the Mobility Group and director of the WiMAX Program Office at Intel Corporation. In this position, he is responsible for planning and deployment of the WiMAX business initiative. Shukla joined Intel in 1979. Previous to his current assignment, he held a number of technical and business management positions spanning development of silicon technologies and mobile products. Shukla has served as platform engineering manager and mobile platform program management in the Mobility Group, general manager of the Silicon-based Photonics Optical Components group, and various positions ranging from key technical contributor to group management, which involved the development of silicon device process and associated packaging/interconnect technologies in the Technology and Manufacturing Group. Shukla received his master's degree in solid state chemistry from the Indian Institute of Technology, Kanpur, India and his Ph.D. in materials science and engineering from the University of California, Berkeley in 1979. He holds several patents and has published numerous papers related to silicon device processing and assembly technologies. He received IEEE Manufacturing Technology of the Year Award in 2000 for leading IC industry transition to flip-chip laminated package and interconnects technologies at Intel Corporation.

Randy L. Wilhelm is vice president of the Technology and Manufacturing Group and general manager of the NAND Products Group for Intel Corporation. Previously, he was vice president of the Intel Communications Group, Desktop Platforms Group, and general manager of the Client Platform Division, where he was responsible for desktop and mobile platform chipset engineering development since 1999. This includes chipset architecture, design and package development, project coordination and manufacturing. Wilhelm has held several product marketing, manufacturing, and division management positions. He was general manager of the Software Product Division from 1998 to 1999, and director of manufacturing for the PCI Component Division from 1995 to 1998. Wilhelm joined Intel in 1984. Prior to joining Intel, Wilhelm was an ASIC design engineer at Motorola for eight years. Wilhelm earned his master's degree in Electrical Engineering from Arizona State University in 1979. He received a bachelor's degree in Electrical Engineering from San Diego State University in 1975.

Rani N. Borkar is vice president of the Digital Enterprise Group and director of the Enterprise Microprocessor Group for Intel Corporation. In this role, Borkar leads multiple microprocessor design engineering teams responsible for the design and development of IA-32 microprocessors in all market segments. Borkar joined Intel in 1988. She has held several technical and senior management positions in microprocessor design and development including the Intel® 80960 embedded processor, the Intel® Pentium® III Processor and the Intel® Pentium® 4 Processor. Borkar has led the development and delivery of a number of leadership products on the Pentium® 4 family. She led the team that was responsible for Intel's award-winning Pentium® 4 Processor design on 130nm technology and the industry's first 3GHz microprocessor in 2002. Most recently she led the development team that delivered Intel's IA-32 dual-core desktop and server products. Borkar received the Intel Achievement Award for the execution of Pentium® 4 processor roadmap and delivering 3GHz in 2002. She is also a recipient of the Corporate Fellow Award in 2004 at the Linkage Women in Leadership Conference. Borkar received her master's degree in physics from the University of Bombay, India in 1982. She received her master's degree in electrical engineering from the Oregon Graduate Institute in 1989.

Ravi Jacob is vice president and treasurer of Intel Corporation. He was named treasurer in April 2005. In this role he manages Intel's cash and investments, capital markets activity, currency and other financial risks, credit and collections, retirement assets and risk and insurance. Prior to his appointment as treasurer, Ravi managed the Acquisitions and Strategic Investments (M&A) group in Treasury. For seven years he led a worldwide team of approximately 50 treasury professionals responsible for structuring and executing Intel Capital's acquisitions, divestitures and strategic investment transactions. Ravi has held several management positions within Intel's treasury organization. From 1994-1998 he worked as assistant treasurer, Europe. Based in Paris, he was responsible for Intel's credit, foreign exchange, investments and financing activities in Europe. In prior roles he managed the company's retirement investments portfolio and the overseas cash management activities. Ravi received Intel Achievement Awards, Intel's highest recognition for individual and team achievement, in 2003 and 2004 for innovative and creative transactions that generated over $600 million in cash benefits for Intel. Ravi joined Intel in 1984. He holds a master's degree in business administration from UCLA.

Raviv Melamed is vice president of the Mobility Group and general manager of the Mobile Wireless Group. He is in charge of research, development and operation of wireless products for various Intel platforms. Prior to his current position he was the director of engineering for the mobile WiMAX Chipset group. Melamed joined Intel in 2004 as part of Intel's acquisition of Envara, a fabless semi-conductor company based in Israel, where he served as vice president of R&D. Prior to that he held several roles in the military where he dealt with project management and system engineering of large-scale communication and radar systems spanning from acoustic to Ka band. He holds a BSC and MSC in electrical engineering from Ben-Gurion University and has co-authored several papers in the areas of airborne reconnaissance, infrared technology and laser communications.

Renee J. James is vice president and general manager of the Software and Services Group for Intel Corporation. She is responsible for software strategy, products and services with research and development operations in more than 20 countries. The Software and Services Group is a worldwide provider of software products, services, technical expertise and resources that can enhance performance, expand capabilities and provide essential ingredients to maximize end-user value and business advantage for its customers, fellow travelers and the industry. Previously, James was vice president and general manager of the Microsoft Program Office. In this capacity, James was responsible for overseeing Intel's relationship and development efforts with Microsoft. Prior to that, James was the director and COO of Intel Online Solutions, Intel's internet application hosting business. James also served for four years as technical assistant to then-Intel chairman and CEO Andrew S. Grove, now Senior Advisor to Executive Management. James has contributed to several key software and services efforts during her tenure at Intel. She was the product and program manager for the first software video codecs (Indeo) and was a key member of the team developing Application Programming Interfaces (APIs) for the unification of Unix on Intel Architecture. Additionally, she was part of the pioneering team working with Independent Software Vendors (ISVs) to move applications to the Intel Architecture. James joined Intel in 1987. She received her bachelor's degree in International Business in 1986 and her MBA in 1992, both from the University of Oregon. James currently serves as an independent director on the VMware Inc. Board of Directors.

Rick J. Echevarria is vice president of the Sales and Marketing Group and general manager of the Enterprise Solution Sales division at Intel Corporation. The mission of Enterprise Solution Sales is to win the Enterprise Global 2000 for Intel by creating business value that leads to Intel becoming the preferred architecture and technology provider for enterprise customers. Before assuming his current position, Rick spent seven years leading Intel® Solution Services, Intel's worldwide professional services organization, helping companies capitalize on the full value of Intel® Architecture through consulting focused on architecture transitions. Earlier, he spent two years as director of product marketing for Intel's Communication Products Group and as director of Internet marketing for the Enterprise Server Group. Before joining Intel in 1994, Rick was a software developer for IBM Corporation in Austin, TX. Rick holds a bachelor's degree in industrial engineering from Purdue University and a master's degree in computer systems management from Union College.

Richard Taylor is vice president and director of Human Resources for Intel Corporation. In this role he oversees all human resources policies and programs for the company worldwide. Taylor joined Intel in 1986 as European audit manager. From 1989 to 1997 he held positions of United Kingdom finance manager, European controller, controller mobile computing group and director of operations Europe. In 1998, Taylor was promoted to corporate controller, and in 1999 his duties were extended to include delivery of worldwide employee services. Prior to joining Intel, Taylor was a corporate auditor for Mobil Oil Corporation from 1981 to 1986. He worked as an audit manager with Deloitte and Touche from 1976 to 1981. Taylor received his bachelor's degree in psychology from Southampton University in the United Kingdom in 1976. He is a member of the Institute of Chartered Accountants.

Richard Malinowski is Vice President of the Mobility Group and General Manager of the Client Components Group, responsible for the development of Intel Architecture client platform components and managing the client chipset business at Intel Corporation. A 19-year veteran of the PC chipset industry, Malinowski has been managing teams developing Intel chipsets since 1994 and LSI Logic Corporation chipset products from 1988 to 1994. Malinowski joined Intel in 1994 as the design manager of Intel® 430FX (Triton) chipset at PCI Components Division (PCD). Intel® 430FX was the main ramp vehicle for the Intel® Pentium® processor platforms and established Intel as the major player in the chipset market. In 1996 he was promoted to director of chipset engineering at PCD, managing engineering teams responsible for the development of all Intel client chipsets. In 2005 Malinowski was promoted to the position of General Manager of Intel Chipset Group, responsible for Intel client chipset business and named Mobility Group Vice President. Malinowski received his master's degree in electrical engineering from the Technical University of Szczecin, Poland in 1981. He received an additional master's degree in business administration from the University of California, Davis in 1998. He has four patents awarded in the area of memory system design and cache design.

Richard Dwyer has been the general manager of Intel's Embedded Sales Group since early 2007. The Embedded Sales Group is a worldwide sales organization focused on positioning and selling Intel technology in non-PC market segments. Dwyer's organization brings significant embedded segment specific market knowledge, broad ecosystem support and comprehensive design expertise that enable OEMs and ODMs to accelerate the deployment of Intel Architecture solutions in embedded applications. Since joining Intel in 1981 as a technical sales engineer, Dwyer has had responsibilities that include roles in sales and management. Prior to his current position, Dwyer was director, Americas Enterprise Solution Sales from 2005 through 2006. In this role he led Intel America's Business Development Organization. He was responsible for the direct relationships with Fortune 500 enterprise IT organizations, ISVs, solution providers and telcos. From 1998 through 2004 Dwyer was director of Intel's Americas Embedded and Communications Group. Dwyer received a bachelor's degree in electrical engineering from Michigan Technological University in 1981.

Robert Crooke is vice president and general manager of the Business Client Group (BCG). He is responsible for directing Intel's vision for delivering innovative business client solutions and for the definition, development, and marketing of Intel's desktop platform solutions. This includes products such as Intel® Core™2 processors with vPro™ technology which are designed to provide increased security and manageability, and deliver energy-efficient performance. Previously, Crooke served as vice president and director of marketing and planning in the Desktop Product Group. This included the processor and chipset product roadmaps as well as digital home and digital office initiatives. From 2000 to 2004 Crooke was vice president and general manager of the Platform Architecture and Solutions Division. In this role he was responsible for the company's development of motherboard products in addition to desktop microprocessor and chipset enabling technology. Crooke has served as director of marketing for the Basic Microprocessor Division and Performance Microprocessor Division. He joined Intel in 1989 in the sales force as a field applications engineer and spent 9 years in the field in various roles. Prior to joining Intel, he held design engineering positions at Alliant Computer Systems and Custom Silicon Inc. He received his bachelor's degree in computer systems engineering from the University of Massachusetts in 1985. Crooke was appointed vice president in 2002 and elected corporate vice president in 2005.

Robert E. Bruck is vice president of the Technology and Manufacturing Group and general manager of the Technology Manufacturing Engineering organization. Bruck is responsible for capital equipment worldwide including: supply chain development, global equipment services, sustaining engineering, conversions, technical training, capacity planning, and corporate resale/reclaim operations. Previously, Bruck was director of Supply Chain Transportation and Engineering in the Customer Fulfillment Planning and Logistics Group where he was responsible for global logistics capabilities, transportation, packaging and supply network design. Prior to that, he served in TME as director of fab capital equipment development, responsible for fab equipment sourcing, development, factory support and supply line management. Bruck has also served as manager of corporate purchasing, where he helped develop Intel's company-wide procurement systems, including corporate commodity management, cost modeling, expenditure planning, information systems and employee development. Bruck joined Intel in 1981. Bruck received his bachelor's degree in marketing in 1979 and his MBA in 1980, both from Arizona State University.

Robby Swinnen is Vice President of Intel's Mobility Group and oversees the Global Business Development activities for the Ultra Mobility Group. This includes launching and bringing to commercial success Mobile Internet Devices in a variety of vertical market segments. He joined Intel in 1992, where he worked at Intel's European headquarters in Swindon, UK, holding a variety of product and channel marketing positions for Intel's Europe, Middle East and Africa (EMEA) sales organization. In 1995, Swinnen transferred to Intel's Portland, Ore. offices, where he led the North American launch of the Intel Product Dealer program, a multi billion dollar sales and marketing program. Swinnen became worldwide director of Intel's Service Provider initiatives in 1998 and assistant general manger of the Reseller Channel Organization in 2001. Swinnen served from 2003 to 2005 as co-general manager of the Partner Marketing Group, overseeing the Intel Inside® program, co-marketing activities and global sponsorship efforts, as well as the Marketing Development Office. Robby Swinnen was appointed Vice President of Intel Corporation and co-President of Intel K.K. (Japan) in January of 2006 and held this position for about 3 years. He received his bachelor's degree in Communications Sciences from the University of Brussels, Belgium in 1986.

Ron Friedman is vice president and general manager of the Mobile Microprocessors Group. He is responsible for teams located in California and Israel that design processors for the converged core roadmap, serving the mobile, server and desktop market segments. Previously Friedman was design manager for the original Pentium® M processor and as well as the next generation Pentium M processor code-named Merom. He joined Intel in 1984 after graduating from Technion, Israel Institute of Technology with a B.Sc in Computer Engineering. Friedman was a recipient of Intel's highest honor, the Intel Achievement Award, in 1986 for development of CAD tools for static analysis of circuitry (CLCD).

Ron Hurle is vice president, Finance and Enterprise Services and general manager, IT Operations and Services. In this role he is responsible for overseeing Intel's IT infrastructure and operations worldwide including all data centers, computing resources, communications infrastructure, PC Services, Service Desks and the IT Emergency Response Team. Previously, Hurle served as director of IT Global Services responsible for Intel's technical assistance centers (TAC) and PC services. He also served as IT customer services manager overseeing TAC, PC services and the customer solutions team for the America's region. Hurle began his career at Intel in 2000. Prior to joining Intel Hurle worked for CDI Corp. as director of operations. He also held the position of director of support services for what is now known as NCS Pearson.

Rory M. McInerney is vice president, Digital Enterprise Group and director of the Enterprise Microprocessor Group. McInerney leads multiple microprocessor design engineering teams responsible for the design and development of the Intel® Itanium® product family targeted at the mission-critical server market. Prior to his current role, McInerney led the design team for the Intel® Xeon® Multi-Processor family. McInerney joined Intel in 1990 as a senior engineer on the Intel 395 Cache Controller, and later moved to a design role on the Intel 486 family of processors. He later joined the design team for the first 64-bit Intel Itanium processor and went on to lead successive generations of this processor family. In 2007, McInerney received an Intel Achievement Award for delivering the Tulsa Xeon-MP processor to market ahead of schedule. He holds two U.S. patents on microprocessor microarchitecture. McInerney graduated from the National University of Ireland, Cork, in 1986 with a bachelor's degree in electrical engineering. He graduated from Santa Clara University in 1997 with a master's degree in business administration.

Shane Wall is vice president of the Mobility Group and director of Strategic Planning, Platform Architecture and Software for the Ultra Mobility Group. He is responsible for all aspects of business strategy, strategic planning, platform architecture and software solutions in support of the Ultra Mobile business. Previously, Wall was the General Manager for the Channel Platform Solutions Group, responsible for developing and managing platform solutions in support of Intel's channel customers. Wall was also a director of the systems technology lab in the Corporate Technology Group, responsible for researching and developing system and platform technologies for current and emerging computer architectures. Wall has also served as director of the emerging technologies lab in the Corporate Technology Group, director of applications and services lab in the Intel Architecture Lab, and director of new business development within the New Business Group. Joining Intel in 1998, Wall holds four patents in the field of color science. Wall received his bachelor's degree in electrical engineering and computing engineering from Oregon State University and is a graduate of the executive education program at Kellogg Graduate School of Management, Northwestern University.

Shelly Esque is a vice president in the Legal and Corporate Affairs group and director of Corporate Affairs for Intel. In this role she oversees a staff that manages corporate social responsibility, education, media relations, government and community affairs programs. Her global team, in more than 30 countries, works to enhance Intel's position as the world's leading technology brand in business and corporate citizenship. Esque joined Intel in 1996 as manager of Public Affairs for the Arizona site. In 2002 she assumed responsibility for Public Affairs in the United States, and in 2004 her role was expanded to include oversight of the worldwide Public Affairs organization as well as Intel's corporate social responsibility functions. Following the formation of the Corporate Affairs Group in 2006, Esque assumed broader responsibilities including the management of Intel's various education programs around the world. From 1990 to1996 Esque served as public affairs director for the Clerk of the Superior Court in Maricopa County, Ariz., and from 1984 to 1990 she led all aspects of operations for a small executive recruiting and market research firm focused on the auto industry. Esque received her bachelor's degree in communications from Arizona State University's College of Public Programs in 1982.

Shmuel (Mooly) Eden is vice president and general manager of the Mobile Platforms Group. In this capacity, he is responsible for the platform architecture, development and marketing of Intel's solutions for the mobile computing segment. Eden joined Intel in 1982. He held numerous technical and management positions in microprocessor design for several Intel microprocessors, including the Intel® Pentium® processor with MMX™ technology. From 1999 to 2003 Eden was director and general manager of the Israel Development Center. He was responsible for the development of the mobile microprocessors and chipsets, including Intel® Centrino® Processor Technology and the Intel® Pentium® M processor, formerly codenamed "Banias." In 2004 he served as vice president and director of marketing for the Mobile Platforms Group, responsible for driving growth in the notebook computing segment. In 2005 he was promoted to the current position as the vice president and general manager of the Mobile Platforms Group. Prior to joining Intel in 1982, Eden was an engineer for Tadiran Communication, Ltd. Eden received a bachelor's degree in electrical engineering from the Technion Institute of Technology in Israel in 1973 and a senior business management degree from Jerusalem University. He taught as an adjunct senior lecturer at the MBA program of the Technion Institute of Technology from 1999 to 2002.

Siva K. Yerramilli is vice president, Technology Manufacturing Group, and general manager of Design and Technology Solutions. He is responsible for leading Intel’s worldwide design and technology solutions organization, which delivers CAD solutions to Intel’s product development and silicon process technology development teams. Yerramilli joined Intel in 1986 as a CAD software engineer in design technology. He has held several technical and management positions in various aspects of CAD. He led a variety of programs including Intel's first CAD framework integration, and Intel's first data path compiler enabling timely completion of projects such as the Pentium®- MMX microprocessor. From 1998 to 2005, Yerramilli managed the Folsom Design Center, and the worldwide design teams developing Pentium® III and Pentium® 4 line of desktop, mobile, and server microprocessors; Yerramilli delivered Pentium III processor (CuMine), Xeon™-2M (Cascades), and Pentium III processor shrink (Tualatin) family of products. Yerramilli received his bachelor’s degree in electronics and telecommunications from Jawaharlal Nehru Technological University, India, in 1983. He studied computer science at Indian Statistical Institute (Calcutta, India). He completed his master’s in computer engineering at Syracuse University in 1986. He completed the Executive Management Program at Harvard University in 1998.

Sohail U. Ahmed is vice president and director of Logic Technology Development for Intel Corporation. Ahmed is responsible for the development and deployment of next-generation silicon logic technologies that will produce future Intel microprocessors. Ahmed joined Intel in 1984, working as a process engineer. He has held several technical and management positions in logic process development, contributing to the development of patterning and thin film technology. Ahmed also worked on the development and transfer to high-volume manufacturing of the last eight generations of process technology. Most recently, he managed all logic technology patterning development, which included the deployment of advanced lithography into manufacturing. Ahmed received a bachelor's degree in chemical engineering from the University of Southern California in 1981. He earned a master's degree in chemical engineering from the University of California, Davis in 1982.

Sriram Viswanathan is managing director of Intel Capital and general manager of the WiMAX program office. As the head of the mobility sector, Viswanathan is responsible for investments on a worldwide basis in the mobile area. He is also responsible for the mobile content and services sector, mobile communications sector and mobile platforms sector. In January 2007 he also assumed responsibility for leading Intel's WiMAX efforts, acting as the corporate focal point for our customers and business partners in this strategic effort for Intel. Previously, Viswanathan served in a variety of positions for Intel Capital, including director of the eHome and broadband sectors and director of the mobile communications sector. He also served as director for the Hollywood/media programs, leading Intel's activities in the media industry in support of Intel's content efforts. Viswanathan joined Intel in 1993 as a technical marketing engineer for corporate demos, responsible for showcasing Intel's leading technologies in industry events supporting Intel's top executives. Viswanathan received his bachelor's degree in physics from American College in 1984. In 1987, he received his second bachelor's degree in computer science and automation from the Indian Institute of Science. Viswanathan received his master's degree from UCLA Anderson School of Business in 1997.

Steven Megli is vice president and general manager of Assembly Test Manufacturing at Intel. He is responsible for managing Intel's assembly and test operations worldwide, which includes facilities in Costa Rica, Philippines, Malaysia, China and Vietnam. Megli joined Intel in 1987 as a process engineer at Intel's Fab 7 in Rio Rancho, NM. From 1997 through 2007 he held factory manager and plant manager positions at Fab 12 and Fab 22 in Chandler, Ariz. Prior to joining Intel, Megli worked as a process engineer at Delco Electronics Corp. Megli received a bachelor's degree in mechanical engineering from Southern Illinois University in 1981. He received a master's degree in materials science from the same school in 1983. He has received both the Intel Achievement Award and the Intel Quality Award.

Steve Dallman is vice president, Sales and Marketing Group and general manager of the worldwide Reseller Channel Organization (RCO). In this role he is responsible for leading Intel's worldwide channel sales efforts, including channel marketing and distribution programs. Dallman has held a number of sales and marketing and management positions at Intel, including director of channel sales and marketing for North America, distribution sales manager for the Americas region and regional sales manager for the Northwestern U.S. and Canada. He joined the company in 1979 as a field sales engineer. Prior to joining Intel, Dallman held engineering positions with Hughes Aircraft and Beckman Instruments. Dallman received his bachelor's degree in electrical engineering from California State University, Fullerton in 1971. He has been named one of the Top 50 Channel Executives by industry trade publications four times and Channel Executive of the Year in 2005.

Steve Rodgers is vice president and associate general counsel, Legal and Corporate Affairs and director of litigation for Intel. In this role he manages the Intel Litigation and Competition Group and is responsible for Intel's worldwide intellectual property, antitrust, securities, commercial, class action and other litigation related matters. He has held this position since 2004. In 2007, this group was named the "Litigation Department of the Year" by the International Law Office on Legal Reform, outside counsel management, law department management and litigation strategy. Rodgers' previous Intel experience includes serving as senior litigation counsel and leading various litigation-related activities. He joined Intel in 2000. Prior to joining Intel, Rodgers was a partner and associate at the Brown and Bain, PA law firm in Phoenix, Arizona focusing on establishment, protection and enforcement of intellectual property rights in the computer industry, including patent, copyright and trademark litigation, counseling and licensing. Rodgers also served as a faculty associate professor of law at the Arizona State University College of Law. Rodgers received his bachelor's degree from the University of Utah in 1989. He received his juris doctorate from the University of Utah in 1992. Rodgers served as editor in chief of the Utah Law Review and was a William H. Leary Scholar.

Stuart C. Pann is vice president of the Sales and Marketing Group and general manager of the Business Management Group for Intel Corporation. In 2008, Pann became general manager of the Business Management Group. In this role, he is responsible for business management functions for all Intel microprocessor and chipset operations. This includes short term and long term forecasting, pricing strategies, corporate strategic planning processes, as well as ongoing performance benchmarking and competitive analyses for Intel client platforms. As general manager of the group, Pann also co-manages the geo operations teams for the Intel sales force and is responsible for external facing supply chain programs. Prior to this role, Pann was co-general manager of the Customer Fulfillment, Planning and Logistics for Intel Corporation. In this role, Pann co-managed Intel's global supply chain and logistics network. Pann joined Intel in 1981 and held several management positions within the company's sales organization before moving into an operations role in 1999 as the director of Microprocessor Marketing and Business Planning for the Desktop Products Group. Pann earned an MBA from the University of Michigan in 1993. He received a bachelor's degree in Electrical Engineering from Michigan Technological University in 1981.

Sunil R. Shenoy is vice president of the Digital Enterprise Group and general manager of the Enterprise Microprocessor Group (EMG). He is responsible for definition and development of microprocessors for Intel’s desktop, workstation and server computing segments, including the Intel® Xeon® and Intel® Itanium® processor families. He oversees development teams located throughout the United States, India, Russia, Costa Rica and Malaysia. Since joining the company in 1981, Shenoy has held technical and management positions related to microprocessor design and development. Shenoy spearheaded the design and delivery of multiple generations of the Intel® Pentium® 4 processors. Shenoy has received two Intel Achievement Awards and holds 16 patents in microprocessor design methods and apparatus. Shenoy earned an MBA from the University of Oregon in 1995. He also received his master's and bachelor's degrees in electrical engineering from Syracuse University in 1981 and the Indian Institute of Technology in Mumbai in 1980, respectively.

Sunit Rikhi is vice president, Technology Manufacturing Group, and general manager of custom IA foundry. His organization provides turnkey custom foundry capabilities to support Intel's product lines in customizing Atom™ based SOCs and growing into new markets including consumer electronics and embedded computing. Rikhi joined Intel in 1984 as a senior CAD s/w engineer in design technology where he developed an internal layout verification and extraction system. Since then, Rikhi has held a variety of senior engineering management positions in Technology and Manufacturing Group including mask operations, manufacturing automation and Logic Technology Development. Rikhi led the development of 300mm automation in Intel's advanced fabs and later was responsible for logic technology planning and collateral circuits development. Rikhi was appointed vice president, Technology and Manufacturing Group in 2006. Rikhi received his bachelor's degree in electrical engineering from the Birla Institute of Technology and Sciences at Pilani, India in 1979, and his master's degree in electrical engineering from the University of Washington in 1981.

Suzan A. Miller is vice president of Legal and Corporate Affairs and Deputy General Counsel. She is responsible for legal support for Intel's product and technology business units. Previously, Miller was general counsel for Intel Capital, Intel's strategic investment program. Miller joined Intel in 1991 as an operations lawyer. Before Intel, she worked at Irell & Manella and Morrison & Foerster. Miller received her bachelor's degree in economics from Bryn Mawr in 1986 and her law degree from Santa Clara University in 1989.

Tammy Cyphert is vice president, Sales and Marketing Group and director of operations for Intel Americas Inc. She manages and is responsible for revenue planning and demand forecasting for the Americas Sales and Marketing Organization's (ASMO) $20 billion (approximate) annual business. Cyphert oversees all aspects of ASMO supply management, pricing, customer interface, order management, supply-line programs and internal operations programs. She joined Intel in 1991 and has held a variety of roles and has managed a number of teams and groups within ASMO. Cyphert graduated from Golden Gate University in 1993 with a bachelor's degree in business management.

Thomas A. Rampone is vice president of Sales and Marketing Group and general manager of the Channel Platforms Group. As one of Intel’s channel chiefs, Rampone leads a worldwide channel organization whose charter is to develop innovative products that meet the unique needs of the emerging markets worldwide and to deliver platform ingredients and solutions to broad channel and local OEM (original equipment manufacturers) customers. Prior to this position, Rampone was general manager of the User-Centered Platform Solutions Division. He managed the development of Intel's desktop platforms, motherboard products and related industry and technology initiatives. Previously, Rampone was director of the Intel Desktop Boards Operation, where he was responsible for development, delivery and support of Intel's desktop board products. Rampone joined Intel in 1984 as a test development engineer, followed by several engineering and management positions in board design and development. Rampone, who holds seven patents, received his BSEET from the Oregon Institute of Technology in 1984.

Tom Swinford is vice president, Digital Enterprise Group and general manager of Intel's LAN Access Division (LAD), which develops and delivers Intel's wired networking products including Ethernet controllers for LAN on Motherboard (LOM) and Network Interface Cards (NICs). Intel's Ethernet products are used in servers, work stations, desktops, laptops and embedded computing applications. Swinford joined Intel in 1997. In his current role, he leads a multi-site global organization responsible for defining, developing, manufacturing and marketing Intel's LAN components and NIC products. Under Swinford's leadership, LAD has delivered Active Management Technology for Intel's vPro platforms, integrated gigabit Ethernet for Intel's client chipsets, multi-port gigabit Ethernet adapters optimized for virtualized servers, data center bridging enabling unified networking, and advanced iSCSI storage area network capabilities. Previously, Swinford held several management positions in Intel's Platform Networking Group and the Security Product Division. Prior to Intel he held various marketing, engineering and management positions in other technology companies including Texas Instruments, Intermec, Central Point Software, Symantec and Now Software. Swinford holds a master's degree in business administration from the University of Washington and a bachelor's degree in mechanical engineering from Washington State University.

Tom Kilroy is vice president and general manager of Intel Corporation's Digital Enterprise Group. This group is Intel’s largest business group accounting for more than half of the corporation’s revenue. As co-general manager, Kilroy is focused on delivering leading platforms and products to businesses worldwide. These platforms span the full gamut of business needs including servers, business clients, storage, communications and embedded applications. In addition to delivering platforms, DEG designs and develops many of the platform ingredients such as microprocessors, chipsets, motherboards, networking components and software. Previously, Kilroy was vice president of the Sales and Marketing Group (SMG) and co-president of Intel Americas, Inc., where he was responsible for all Sales and Marketing activities in North America and South America. Before that, he was SMG vice president and general manager of the Communications Sales Organization, where he led global sales of Intel's communications products. He also spent five years leading the Reseller Channel Organization, responsible for worldwide sales and channel marketing. Kilroy joined Intel in 1990 as central region sales manager for the Personal Computer Enhancements Operation, where he was responsible for creating Intel's branded sales operation in the central United States. In 1993, he was promoted to oversee sales across the United States and Canada as North America sales manager for Intel's Reseller Channel Operation. He was promoted to general manager for RCO in 1997 and was appointed vice president in 2000. Prior to joining Intel, Kilroy held sales and channel management positions with Burroughs Corporation and Wang Laboratories. He received his bachelor's degree in business administration from Western Illinois University in 1979.

Thomas R. Macdonald is vice president of the Digital Enterprise Group and general manager of the Platform Components Group. Prior to his current position, Macdonald was the general manager of the Advanced Components Division. Since joining Intel in 1988 as a product manager for the Intel386™ microprocessor, Macdonald has held a variety of marketing and management positions in microprocessor and platform marketing, as well as InfiniBand* technology products. Macdonald has also served as marketing director for the Intel486™ processor family, the Intel® Itanium® processor family, and for the Enterprise Server Group (ESG). In his role with ESG he was responsible for all platform and product marketing and planning, including launching Intel's first server-optimized processor, the Intel® Xeon® processor. Macdonald received his bachelor's degree in mechanical engineering from Stanford University in 1984, and his MBA from the Kellogg Graduate School of Management, Northwestern University, in 1988. He is a member of the Tau Beta Pi Honor Society for engineering, and the Beta Gamma Sigma Honor Society for business.

Timothy G. Hendry is vice president of the Technology and Manufacturing Group and Fab11X plant manager for Intel Corporation. He is responsible for all operations at Fab 11X in Rio Rancho, New Mexico, the company's first 300mm high-volume manufacturing facility, and for overseeing technology used to control and monitor equipment at Intel's network of wafer manufacturing facilities. Hendry joined Intel in 1988 as a senior process engineer in Rio Rancho. He has also served as the process engineering manager and as a factory manager at Intel manufacturing facilities in New Mexico. Prior to joining Intel, Hendry was a process engineering group leader at Fairchild Semiconductor from 1982-1987. He received his bachelor's degree in metallurgical engineering from the University of Washington in 1982. Hendry is the recipient of two Intel Achievement Awards.

Ton Steenman is vice president, Digital Enterprise Group, and general manager of the Low-power Embedded Products Division. In this capacity, he is responsible for the architecture, development and marketing of Intel® Atom™ architecture based microprocessor for embedded market segments. Furthermore, Steenman is responsible for Intel Architecture based embedded platform solutions for In-vehicle Infotainment, Industrial Control, Video Analytics, Enterprise print imaging, and residential gateway market segments. He has held numerous sales, applications, marketing and management positions in Intel's field sales organization and a variety of business units. Over the past few years, he has held general management positions for the Embedded Intel Architecture Division, the Modular Communications Platform Division, and the Embedded and Communications Processor Division. Steenman was instrumental in establishing Intel's position in embedded market segments such as communications, automotive, security, storage, point of sale, gaming and industrial control. Intel's position in the embedded market has strengthened considerably over the past decade as the company has introduced a broad set of Intel Architecture-based platforms. Furthermore, Intel has built out a rich ecosystem of companies that provide hardware and software solutions specifically focused on the requirements of embedded market segments. Prior to joining Intel in 1982, he held software engineering and microprocessor design positions at Siemens Netherlands and the Royal Dutch Air Force. He received his bachelor's degree in electrical engineering in 1980 from MTS Leyweg in the Netherlands.

Eric Mentzer is the vice president of the Mobility Group and general manager of the Graphics Development Group for Intel Corporation. In this role, Mentzer is responsible for the architecture and HW/SW product development of Intel's integrated graphics cores. From 2004 to 2007 he was vice president of the Mobility Group and co-general manager of the Chipset Group. He was responsible for Intel's client chipset business, including chipset and graphics architecture, design, development and manufacturing. In this role Mentzer delivered the mobile and desktop chipset and graphics products that were a foundation for the client platform strategies. Mentzer served as the vice president of the Intel Communications Group and Chief Technology Officer from 1999 to 2004. In this position, he was responsible for Intel's technology vision and strategies for communications. Mentzer joined Intel in 1985, holding positions as a field applications engineer and an architectural specialist. In 1992, he became director of Marketing for Intel's Platform Components Division. Mentzer led the product and technical marketing that established Intel's chipset/core logic business while driving industry initiatives like PCI. In 1997, Mentzer transitioned to the newly created Graphics Component Division and drove the strategic and product marketing for the AGP and Intel's graphics product line that transformed into our integrated graphics business. In 1999, Mentzer moved back to the Sales and Marketing Group as director of Sales Applications, Marketing and Services (SAMS) leading the worldwide technical sales force. Prior to joining Intel, Mentzer was an electronics design engineer for Harris Corporation, Government Systems Sector. He received his bachelor's degree in electrical engineering from the University of Maryland in 1982. Mentzer was born in Havre De Grace, MD in 1960.

Wen-Hann Wang is vice president of the Software and Services Group, and general manager of the Software and Solutions and Product Development in China. Prior to his current assignment, he served as general manager of the Middleware Products Division in the Intel Software and Services Group. Wang joined Intel in 1991 as a PentiumPro Platform architect, working on the highly successful P6 product family. His platform architecture and analysis work was instrumental in the creation of the Xeon server product line. He served as platform infrastructure research manager of the newly formed Intel Microprocessor Research Lab (MRL) in 1995 and later became director of the Emerging Platforms Lab, delivering cutting-edge technologies and reference platforms for Intel product groups. In 2000, Wang relocated to Shanghai to head up the Technology Development Division of SSG, developing software technologies and reference designs to accelerate growth in emerging markets. Wang holds 15 patents and has received numerous technical awards. Prior to joining Intel, he was a research staff member at the IBM T. J. Watson Research Center. Wang received a bachelor's degree in electrical engineering from National Taiwan University in 1981, a master in electronic engineering from Philips International Institute of Technological Studies (Eindhoven, Netherlands) in 1985, and a Ph.D. in computer science from the University of Washington in 1989.

William A. Swope is corporate vice president and general manager of Intel's Corporate Sustainability Group. In this role, he is responsible for driving Intel's environmental efforts in the areas of policy, operations and products. Swope works with stakeholders across the company to ensure that Intel continues to build upon its industry leadership in sustainability. Since joining Intel in 1979, Swope has held numerous roles including corporate affairs leadership, manufacturing technology planning, strategic product planning and product management. Swope was director of Digital Enterprise Brand Management, and prior to that he was general manager of the Software and Solutions Group (SSG), reporting to the president and chief operating officer of Intel. In that capacity he managed the software products and enabling efforts within SSG. From 1993 to 1995, Swope was the general manager of the Intel® Pentium® Pro processor team. Swope was promoted to vice president in 1996 and corporate vice president in 2003. Swope received his bachelor's degree in applied physics from Tufts College. He earned his master's degree in management from Massachusetts Institute of Technology.

Xu (Ian) Yang is a vice president of Intel’s Sales and Marketing Group, Intel Corporation, and president of Intel China Ltd. Effective Jan 1, 2007, China became an independent region, reporting directly to Intel Corporation headquarters in Santa Clara, Calif. China formerly was part of Intel’s Asia Pacific region. During that time, Yang had shared with John A. Antone the responsibility of general manager for Intel Asia-Pacific region. In 2000, Yang was appointed country manager for Intel China. In this role he managed the company’s sales and marketing operations and focused on further developing Intel’s presence across the country. Yang first joined Intel in 1986 as a student intern and has held numerous marketing, sales and management positions in China and the United States. These include: OEM sales district manager in China, where he was responsible for developing Intel’s local PC OEM business in China; and business development manager in Intel’s OEM Products and Services Division where he focused on growing Intel’s motherboard business in the western region of the United States and across the Asia-Pacific region. Yang received a bachelor’s degree in electrical engineering from the GMI Engineering and Management Institute in Flint, Mich., in 1990.

David (Dadi) Perlmutter is executive vice president and general manager of Intel Corporation's Mobility Group. He is responsible for the architecting, developing and marketing of Intel's solutions for the mobile computing segment including Intel® Centrino® brand notebooks, mobile internet devices wireless networking and the development of the Intel Core2™ duo family of products for all of Intel. He also manages cross-Intel product development and architecture decisions. Prior to his current role, Perlmutter was vice president and general manager of Mobile Platforms Group, where he developed the first Intel Centrino processor technology, which grew the mobile business and became the foundation for development of the Core2 Duo processor family. Previously, Perlmutter was vice president, Microprocessor Products Group, and general manager, Basic Microprocessor Division as well as the manager of the Intel Israel Development Center in Haifa, where he led the development of the Intel® Extended Temperature Pentium® processor with MMX™ technology and its mobile versions as well as other products. He took over as general manager of the Mobile Platforms Group in 2000 and became co-manager with Sean Maloney of the Mobility Group in 2004. Perlmutter led the development teams of the Intel® i387™ math coprocessor and Intel® i860™ XP RISC processor in the Israel Development Center. He also led the team that defined the initial direction for the Pentium processor microarchitecture. In 1992, he became general manager of the Microprocessor Division responsible for the design, development and marketing of the Intel® Pentium® Pro and the Intel® Pentium® II processors. He joined Intel in 1980 after graduating from Technion, Israel Institute of Technology, with a B.Sc. in electrical engineering. Perlmutter holds patents on branch target buffers and multiprocessing cache coherency protocols. Perlmutter received an award for innovation in industrial development from the Israeli president in 1987 for the development of the i387 math coprocessor. Perlmutter was elected a Fellow of the Institute of Electrical and Electronics Engineers for contributions to the mobile personal computer industry.

Eric Kim is senior vice president and general manager of Intel Corporation's Digital Home Group. Previously, Kim was general manager of Intel Corporation's Sales and Marketing Group and served as Intel's chief marketing officer, responsible for all sales and marketing operations worldwide. Prior to joining Intel in November 2004, Kim was an executive vice president at Samsung Electronics Co., Ltd. He was responsible for global marketing and new business development and helped make Samsung a leading worldwide consumer brand. Prior to joining Samsung in 1999, Kim had significant and varied experience in hardware and software marketing, product development and venture investment management. During his five years with Dun & Bradstreet Corporation, Kim was president and CEO of Pilot Software and a chief technology officer. For Lotus Development, he was general manager of database products. Time Magazine named Kim to its annual "Global Influentials" list in 2002. Kim holds a bachelor's degree in physics from Harvey Mudd College, a master's in engineering systems from UCLA, and an MBA from Harvard Business School.

John E. Davies is vice president of the Intel World Ahead Program for Intel Corporation. Davies is focused on creating demand for Intel platforms via Solutions, new usage models, and ecosystem scaling. His mandate is to bring the benefits of technology to the next billion people by working with the industry, governments and development agencies. Davies has worked for Intel since 1978, when he joined the company as the Reliability/QA Manager. During his 27 years with Intel, Davies has worked in engineering and manufacturing, as marketing manager for automotive products in Europe, and marketing manager for strategic accounts. He has been director of Marketing for the Mobile Computing Group, and vice president and marketing director for the Consumer Desktop Products group. In late 90’s John was vice president and general manager of Intel Asia Pacific Region where he was based in Hong Kong. Prior to joining Intel, Davies worked as a postdoctoral research fellow at IBM and as a development engineer at Philips in the United Kingdom. Davies received his B.S. in Chemistry and his Ph.D. in Solid State Physics from Imperial College, London University. Intel has awarded Davies two prestigious Individual Achievement Awards for establishing Intel in the European automotive market in 1986, and for driving Intel’s mobile computing architecture into the Japanese market in 1992.

Bill Holt is senior vice president and general manager of Intel Corporation's Technology and Manufacturing Group. He shares responsibility with Bob Baker for managing Intel's technology development and manufacturing activities. Holt joined Intel in 1974 as a development engineer and worked as technical contributor or manager in DRAM development until 1985. During this time he worked in product engineering, test engineering, circuit design and CAD tool development. He was involved with Intel DRAMs from the 4K through the 1MB generations. Next, he assumed responsibility for the definition of design rules, devices and test chips for logic technologies. Holt was the program manager for the development of Intel's first BiCMOS process. He managed factory automation development for the 0.35 µm generation. In 1999, Holt became co-director of the Logic Technology Development organization, which is responsible for the research, definition and development of new generations of logic technologies, advanced circuit design, advanced patterning, test technology and process and circuit simulation tools. He has been the co-general manager of TMG since March 2005. Holt was appointed vice president in January 1999. In 2003, he was elected corporate vice president. Holt is a graduate of the University of Illinois, where he received his bachelor’s degree in electrical engineering in 1974. He received his master’s in electrical engineering from the University of Santa Clara in 1979.

Lin Chao is the Publisher of Intel Technology Journal. Lin joined Intel in 1986 and has held various product marketing positions for Intel's microprocessors and software products. Her current interests are in Internet technologies. Prior to joining Intel, she held research and engineering positions in signal processing with Raytheon Company, Research Division and Hewlett-Packard Company. She holds a B.S. degree in Electrical Engineering from the Massachusetts Institute of Technology, an M.S. in Electrical Engineering from SUNY at Stony Brook, and an MBA from the University of Chicago.

Albert Fazio is an Intel Fellow and Director of Memory Technology Development in the Technology and Manufacturing Group. In his current position, Fazio is responsible for exploring and developing flash memory and multi-level cell memory technologies as well as novel memory technology ideas. Since joining Intel in 1982, Fazio has been involved in various engineering roles in memory development programs including SRAM, EPROM, E2PROM, NVRAM and Flash Memories. His technical contributions and leadership have helped pioneer new capabilities in the area of Flash, Strata-Flash, and Flash and logic combinations, providing cost and functionality advantages to Intel products. Fazio's technical papers have been published in several publications and at international technical conferences. He received outstanding paper awards at the IEEE International Reliability Physics Symposium and IEEE International Solid-State Circuits Conference. Fazio holds 24 patents and has received three Intel Achievement Awards. He frequently serves as a panelist on international memory panels and gives technical seminars and talks to the industry and universities. He previously served as Technical and General Chairman of the IEEE Non-Volatile Semiconductor Memory Workshop. Fazio received his bachelor's of science in Physics from The State University of New York at Stony Brook in 1982. He was born in New York City in 1961.

Boris Babayan is an Intel Fellow and Director of Architecture for the Software and Services Group. He leads worldwide efforts related to compiler technologies for Intel server products, technologies that enable applications to run on multiple computer architectures without recompiling, and helping to develop Intel security technologies. He will also be a key Intel representative to the leading Russia Academies and Universities, working to attract top talent to Intel sites located in Moscow, Nizhniy and Novosibirsk. Babayan joined Intel in August of 2004. Prior to coming to Intel, he held numerous positions, including director of the Institute of Microprocessor Computer Systems for the Russian Academy of Science, chairman of Elbrus International, chief technological officer at the Moscow Center for SPARC Technologies and director of the Institute of Computer Technologies. From 1956 to 1996, Babayan worked at the Institute of Precise Mechanics and Computer Technology, eventually becoming chief of the hardware and software division. He completed his Ph.D. in 1964 and his doctorate of science in 1971. Babayan served as professor and chair of Computer Science at the Moscow Institute of Physics and Technology from 1996 to 2004. Babayan has been a corresponding member of the Russian Academy of Science since 1984, has served as chairman of the Academic Council at the Institute of Microprocessor Computer Systems, RAS, and chairman of the dissertation council for awarding Ph.D. and Doctorate of Science Degrees, IMCS RAS. He is a member of the State Committee for State Prize Award of Russian Federation. He has served as a member of editorial boards for a number of technical journals, including deputy editor-in-chief of the Information Technologies and Computer Systems journal for the Russian Academy of Science. Babayan's awards include the State Prize award for development and implementation of complex equipment for CAD, manufacturing and control of complex electronics in 1974; the Lenin Prize award for development and implementation of multiprocessor computer system Elbrus 2 in 1987; the Order of the Red Banner of Labor in1972; the Order of the October Revolution for design and development of Elbrus 1 computer in1982; and the Medal of Honor for design and development of Elbrus 90micro computer in 2000. He has published numerous book and papers on computer architecture. He was born December 20, 1933.

Bryant E. Bigbee is an Intel Senior Fellow, Software and Services Group and director of systems software. Bigbee directs work on the design and optimization of processor and chipset interfaces to operating systems, drivers and firmware. Bigbee joined Intel in 1992 and has been involved with a wide variety of commercial operating system and firmware initiatives and optimizations. Bigbee holds seven patents, with 18 patents pending in the areas of microprocessors and systems software. He has received three Intel Achievement Awards. Bigbee was born in Santa Fe, N.M. and graduated from the Georgia Institute of Technology in 1991 with an M.S. in information and computer science. He completed an internship in internal medicine at Emory University in 1990 after earning his M.D. there in 1989. He earned a bachelor's degree in chemistry at Claremont McKenna College in 1985.

Clair Webb is an Intel Fellow and Director of Circuit Technology in Intel's Technology and Manufacturing Group, based in Hillsboro, Ore. He is a member of the Logic Technology Development Design Group, responsible for defining and developing circuit directions and optimizing the manufacturing process technology for high-performance microprocessor products. Webb joined Intel in February 1976 and was responsible for designing and working on all generations of DRAMs from 16 Kbits to 1 Mbit. Webb subsequently worked on SRAM and cache memory designs in addition to five Intel microprocessor designs. Prior to joining Intel, Webb worked on DRAM design and testing at Motorola. Webb received a bachelor's degree in Electrical Engineering from Utah State University and is a member of the IEEE. He was born in Richmond, Utah.

David B. Papworth is an Intel Fellow, Legal and Government Affairs and the director of Microprocessor Product Development. Papworth designs next-generation microprocessor architectures, including concept development, performance analysis, resolution of detailed design and compatibility issues, and interaction with software developers. He also provides technical direction and expertise in moving new designs and proliferations from silicon to production and launch. Papworth joined Intel in 1990 as a staff VLSI architect. He was one of the lead architects of the Pentium® Pro microprocessor. In 1994, he became principal processor architect, responsible for the system debugging of the Pentium Pro processor. His team received an Intel Achievement Award and an Intel Quality Award in 1996 for the Pentium Pro microarchitecture. He also receive an Intel Achievement Award in 1997, for the design and use of the P6 Microcode Update facility. Papworth is named as inventor or co-inventor on 56 patents for microprocessors, computers, and computer systems. Papworth was born in Hancock, Mich., in 1956. He received his bachelor's degree in Electrical Engineering from the University of Michigan, Ann Arbor, in 1979. Prior to Intel, Papworth worked at Multiflow Computer as director of hardware engineering, and at Prime Computer as a principal engineer designing digital logic for super-minicomputers.

David J. Kuck is an Intel Fellow, Software and Services Group, and Director of the Parallel and Distributed Solutions Division (PDSD). PDSD provides software tools and technologies to enable parallel program development for multi-core and cluster environments, and works directly with ISVs and end users to help them create high performance parallel applications. PDSD and its Advanced Computing Center (led by Kuck) also engages in leading edge computer system design and analysis. David was previously part of Intel's Enterprise Platforms Group and Director of the KAI Software Lab, a leading provider of performance-oriented compilers and programming tools used in the development of multithreaded applications. Kuck founded KAI in 1979 and is an emeritus faculty member of the Computer Science and Electrical and Computer Engineering departments of the University of Illinois at Urbana-Champaign. He also served as director of the Center for Supercomputing Research and Development. Kuck holds a bachelor's degree in electrical engineering from the University of Michigan, as well as a master's degree and Ph.D. in engineering from Northwestern University. He is a fellow of the American Association for the Advancement of Science, the Association for Computing Machinery, and the Institute of Electrical and Electronics Engineers. He is also a member of the National Academy of Engineering. Kuck holds two patents and has published over 100 papers.

Intel Fellow Devadas (Dev) Pillai is the Director of Operational Decision Support Technology in the Logic Technology Development group, based in Chandler, Arizona. He is currently responsible for development and proliferation of manufacturing simulation technology and mathematical modeling & optimization capabilities across Intel's wafer fabrication, sort, assembly and test factories worldwide. Pillai is Intel's first fellow whose technical expertise spans production simulation, robotics and factory automation. He has been honored many times by his industry peers as one of the most influential engineers who drove the vision and industry direction for large scale factory automation in semiconductor manufacturing. Pillai introduced the use of computer simulation technology for Intel's factory operational designs beginning in 1986. From 1989 to 1994, he was the Design Engineering Manager of the Automated Material Handling Systems Group and led the company's successful 150mm and 200mm robotic transport systems development. From 1994 to 2000, he was Factory Integration Manager who coordinated Intel's highly successful 300mm production equipment, facilities and automation interface standardization and interoperability development with the worldwide consortia. Prior to his current position, he managed Intel's Enabling Technologies and Solutions group that was responsible for yield, fault isolation and failure analysis tools, process and production control systems, knowledge management capabilities and machine learning programs. Prior to Intel, Pillai was a development engineer at Ford Trucks. Pillai is the recipient of two Intel Achievement Awards. In 2000, he was recognized by the National Academy of Engineering at the Frontiers of Engineering conference. He has written more than 90 peer-reviewed technical papers and presentations in IEEE, ISSM, SME, JES, IIE and SEMI publication in the fields of factory automation, 300mm factory design, and simulation modeling. He has also written a section on automation in the McGraw Hill Encyclopedia of Science and Technology and has co-authored a chapter in the Handbook of Semiconductor Manufacturing Technology, published by Marcel Dekker. Pillai received his master's degree in Industrial Engineering specializing in computer-aided processes, from Arizona State University in December 1983 and his bachelor's degree in Mechanical Engineering from the National Institute of Technology, Calicut, India, in 1980.

Eric Dishman is an Intel Fellow, Digital Health Group and general manager and global director of product research and innovation. He is responsible for driving Intel's worldwide research, new product innovation and usability engineering activities in the healthcare area. Dishman joined Intel in 1999 as a senior researcher, and has been involved in a variety of research and management roles related to Intel's consumer and healthcare businesses. Trained as a social scientist, he has been involved with bringing an ethnographic approach to Intel's research and product development efforts. Dishman is co-founder and serves as international chair for the Center for Aging Services, is co-director of the Technology Research for Independent Living and helped found the Everyday Technologies for Alzheimer's Care program with the Alzheimer's Association. Dishman holds four patents and has published 13 papers. Dishman graduated with honors from the University of North Carolina, Chapel Hill with a bachelor's degree in English as well as receiving degrees in speech communication and drama, all in 1991. He earned a master's degree in speech communication from Southern Illinois University in 1992.

Eugene S. Meieran, Intel Senior Fellow, transferred to Intel Research in CTG in 2007 after spending 34 years in TMG. He is working on introducing advanced innovation and collaboration technology into Intel to help improve internal overall business performance. Meieran joined Intel Corporation in 1973 as manager of package development (now ATD), with responsibility for developing new lines of device packages for the emerging memory and microprocessor product lines. In 1977 he transferred to the Quality and Reliability Department, responsible for Intel incoming materials quality, creating the new Materials Analysis Laboratories and for key elements of the manufacturing quality and reliability functions. In 1985, he was appointed as Intel Fellow, the second in the company's history. In 2007, he transferred from TMG to CTG. He is currently a member of the Intel Research Council and the Intel Academic Relations Council, and was Intel's representative to the Semiconductor Research Corp. (SRC) Factory Sciences Board. He has received two Intel Achievement Awards. Meieran received his bachelor's degree from Purdue University in 1959 and his master's and ScD degrees from the Massachusetts Institute of Technology, Cambridge, Mass. in 1961 and 1963, respectively, in the field of Material Science.

Fayé Briggs is an Intel Fellow and director of Scalable Server Architecture for the Digital Enterprise Group. He is responsible for ensuring that Intel's multi-core and many-core-based server architectures achieve world-class performance. Briggs has had a leadership role in developing multiple generations of innovative multiprocessor server and chipset designs, including all current front side bus-based Xeon dual and multi-processor server chipsets and platform architectures. He conceptualized the first Intel point-to-point scalability port for 2P-16P scalable architecture family of 870 server chipsets for Itanium and Xeon servers and led development of the devices. Prior to joining Intel in 1997, Briggs held various positions at Sun Microsystems including serving as a co-architect of Sun's original SPARC processor. Briggs was also a co-founder and CTO of Axil Computers, where he led the development of chipsets, boards and systems for more than 30 servers, storage and workstation products. He also served as a tenured associate professor at Rice University and as a faculty member at Purdue University, both in electrical and computer engineering. Briggs has published numerous technical papers on processor and multiprocessor architectures, memory ordering, cache coherence and system performance. He is the co-author of the McGraw-Hill-published textbook "Computer Architecture and Parallel Processing." Briggs has been awarded four patents and received an Intel Achievement Award for the successful definition and execution of Intel's first quad core products. Briggs received his bachelor's degree in engineering in 1971 from Ahmadu Bello University, Nigeria. He received his master's degree in electrical engineering from Stanford University in 1974, and his doctorate in electrical and computer engineering from the University of Illinois, Urbana-Champaign in 1977.

Genevieve Bell is an Intel Fellow and director of the User Experience Group within the Intel Digital Home Group. Bell joined Intel in 1998 as a researcher in the Corporate Technology Group's People and Practices Research team - Intel's first social science oriented research team. She helped drive the company's first non-U.S. field studies to inform business group strategy and products and conducted groundbreaking work in urban Asia in the early 2000s. Bell currently leads an R&D team of social scientists, interaction designers and human factors engineers to drive consumer-centric product innovation in Intel's consumer electronics business. In this role she is responsible for setting research directions, conducting comparative qualitative and quantitative research globally, leading new product strategy and definition, and championing consumer-centric innovation and thinking across the company. Prior to joining Intel, Bell was a lecturer in the Department of Anthropology at Stanford University. She has written more than 25 journal articles and book chapters on a range of subjects focused on the intersection of technology and society. Her book, "Telling Techno-Cultural Tales," co-authored with Prof. Paul Dourish, is being published by MIT Press. Raised in Australia, Bell received her bachelor's degree in anthropology from Bryn Mawr College in 1990. She received her master's and doctorate degrees in anthropology from Stanford University in 1993 and 1998, respectively.

Glenn Hinton is an Intel Fellow, Digital Enterprise Group and Director of IA-32 Micro-architecture Development. He is responsible for the micro-architecture development of the next generation IA-32 design. He was appointed Intel Fellow in January 1999. Hinton joined Intel as a new college graduate in 1983, after working for two summers as a co-op student starting as a design engineer. In 1986, Hinton was one of the two lead micro-architects of the i960® CA, which was the world's first super-scalar microprocessor. He was one of three senior architects in 1990 for the P6 processor design, which became the Intel® Pentium® Pro, Intel® Pentium® II, and Intel® Pentium® III processors. He led the micro-architecture development for the Intel® Pentium® 4 processor beginning in 1995. He holds more than 90 patents from 6 different CPU designs. He received the ACM Maurice Wilkes Award in 2002. Hinton received bachelor's and master's degrees in Electrical Engineering from Brigham Young University in 1982 and 1983, respectively. He was born in Provo, Utah, in January 1957.

Greg Taylor is an Intel Fellow and director of the Circuit Research Lab in Intel's Corporate Technology Group. He is responsible for research on low power and high speed circuits, high speed signaling, and enabling design and circuit technologies within Intel. Taylor joined Intel in 1991 and has held several senior design engineering positions working on 10 generations of microprocessors including members of Intel's Pentium®, Pentium® II, Pentium® III, and Intel NetBurst® microarchitecture families. Prior to joining Intel, he worked as a principal engineer at Bipolar Integrated Technology. Taylor is a Fellow of the Institute of Electrical and Electronics Engineers. He received his bachelor's degree in computer and systems engineering in 1981 from Rensselaer Polytechnic Institute (RPI). He also received a master's degree and doctorate in computer and systems engineering from RPI in 1983 and 1985, respectively. His graduate work was completed with the support of a Fellowship from the Fannie and John Hertz Foundation.

Intel Senior Fellow Ian Alexander Young, an Intel employee since 1983, is the Director of Advanced Circuits and Technology Integration, Portland Technology Development, in Hillsboro. Ore. He is responsible for defining and developing future circuit directions and optimizing the manufacturing process technology for high-performance microprocessor and communications products. Starting from development of circuits for a 1Megabit DRAM, he led the design of three generations of SRAM products and manufacturing test vehicles, and developed the original Phase Locked Loop (PLL) based clocking circuit in a microprocessor for the 50MHz Intel486™ processor. He subsequently developed the core PLL clocking circuit building blocks used in each generation of Intel processors through the 0.13um 3.2 GHz Pentium 4, enabling them to leverage transistor speed improvements. This innovative clock circuit was one of the key factors for his promotion to Intel Fellow in 1996. Young has developed a number of optimization metrics for technology development, including the transistor performance metric (FEM) that provided a link between processor performance and basic transistor parameters. After development of a 10Gb/s SONET Serdes transceiver in the 90nm CMOS communications process, he recently led a small group of engineers to produce a world class CMOS Low Noise Amplifier and a wireless LAN RF/baseband Radio in 90nm CMOS. Young holds 34 patents. He has written more than 10 internal technical publications for the Intel Design Technology Conference, and Intel Technical Journal, as well as numerous external technical publications for IEEE journals. Young has received three Intel Achievement Awards: In December 1996, "For development of a High Performance P856 Transistor 1.5 Years before Certification;" in April 1992, "For contributions made to the team defining and implementing a unique, cost effective approach to BiCMOS processing for Intel;" and in May 1991, "For the contribution made in the design of an analog PLL for 50-MHz Intel 486 microprocessor chip set. The functional C8 B-step silicon exceeds design requirements." He has also received divisional awards "for contributions to developing understanding of low power circuit design Best Known Methods and promoting attention to Energy and Speed trade-offs in design throughout the company" and "for exceptional support of LAD Gigabit PHY Analog debug and validation," from Intel's Microprocessor Products Group and Intel's Communications Group. Born in Melbourne, Australia, in 1951, he received his bachelor's and master's degrees in Electrical Engineering from the University of Melbourne, Australia, in 1972 and 1975. He received his Ph.D. in Electrical Engineering from the University of California, Berkeley in 1978. Prior to Intel, Young worked on analog/digital integrated circuits for Telecommunications at Mostek Corporation, and did some consulting work. Young serves on the Intel Technology Council and is a member of Intel's Research Council for University research funding. He has served on the technical working group for the development of the International Technology Roadmap for Semiconductors and is a SIA/MARCO Interconnect Focus Center Research Mentor. Young's contributions in the professional societies outside of Intel have been recognized with his appointment in 1999 as an IEEE Fellow for "contributions to microprocessor design and technology." He currently is serving as the technical program committee chairman of the 2005 International Solid-State Circuits Conference (ISSCC), and is a past chairman of the Symposium on VLSI Circuits. He serves on the Executive Committee for the VLSI Symposia.

James Held leads a virtual team of senior architects chartered with developing the architectural framework and research roadmap for the Corporate Technology Group’s Tera-Scale Computing Research. Since joining Intel in 1990, Held has served in a variety of positions working on computer supported collaboration technology and Intel Native Signal Processing (NSP) infrastructure. He served as staff principal architect in the Media and Interconnect Technology Lab in IAL and as the Lab Director in CTG, managing the Volume Platforms Lab. As a Senior Principal Engineer in the Microprocessor Technology Lab, he conducted research on extensible processor architecture, multi-core processor architecture and helped develop Intel’s virtualization technology strategy. Before coming to Intel, Held worked in research and teaching capacities in the Medical School and Department of Computer Science at the University of Minnesota. He is a Member of the IEEE Computer Society and the Association for Computer Machinery (ACM). Held earned a B.S. in Chemical Engineering in 1972 and an M.S. (1984) and Ph.D. (1988) in Computer and Information Science, all from the University of Minnesota.

Joel S. Emer is an Intel Fellow, Digital Enterprise Group, and Director of Microarchitecture Research. Emer joined Intel as part of a June 2001 agreement with Compaq Computer Corporation that called for the transfer of microprocessor engineering and design expertise to Intel. Prior to joining Intel, Emer was a Compaq Fellow and Director of Alpha Architecture Research, where he led research efforts for future processors for Compaq's 64-bit family of servers. With over 25 years of combined service to Compaq and Digital Equipment Corporation, Emer has held various research and advanced development positions investigating processor microarchitecture designs and developing performance modeling and evaluation techniques. Emer is recognized as one of the developers of the widely employed quantitative approach to processor performance evaluation. More recently, he has been recognized for his contributions in the advancement of simultaneous multithreading technology. He holds 15 patents and has published more than 30 papers. Emer received a bachelor's degree with highest honors in electrical engineering in 1974, and his master's degree in 1975 -- both from Purdue University. Emer earned a doctorate in electrical engineering from the University of Illinois in 1979.

Jose Maiz is an Intel Fellow and director of Logic Technology Quality and Reliability. He joined Intel in 1983, and was promoted to fellow in 2002. He is presently responsible for identification of silicon reliability limiters to scaling, and their resolution for Intel's next generation silicon technologies and logic products. He first joined Intel's 1Mbit DRAM program transitioning to the 1µm logic technology generation. He has since led silicon reliability teams at various phases of development, including the ramp readiness of the 180nm technology generation. Since the mid 80's, he has been a major force in integrating technology reliability with technology development to ensure that Intel's logic processes are robust for reliability while delivering top performance. He has originated or developed many innovative Quality and Reliability methodologies, including Electromigration under non-direct currents and on short lines, use of SCRs and specially designed transistors for Electrostatic Damage protection, risk assessment methodologies, use conditions to assess reliability risk, improvement of electromigration capabilities for copper, and inter-leaving rules to protect memories against soft errors, among others. He is presently focused on the 45nm technology. Maiz holds 4 patents and has 10 more pending. He has authored or co-authored over 25 publications and conference presentations, a number of them invited. He is presently co-editor of a special issue of IEEE Transactions in Device and Materials Reliability focused on soft errors. He is a co-recipient of an Intel Achievement award for the "Development of a complete solution for ESD protection on logic technologies using standard cells" in 1991 and has received numerous divisional recognition awards. He is also a Fulbright Scholar (1978). Jose Maiz was born in San Sebastian, Spain, in 1954. He graduated with a degree in physics from the University of Navarra in San Sebastian in 1976. He then moved to the U.S., graduating with a master of science and a Ph.D in Electrical Engineering from Ohio State University in 1980 and 1983 respectively. He presently chairs the committee overseeing Intel's university research in reliability as well as interconnect processing. He has served in the past as Intel's reliability representative in the Sematech RTAB, served in paper selection committees for the International Reliability Physics Symposium (IRPS) and International Electron Devices Meeting (IEDM), chaired workshops like the 2002 Topical Research Conference on Reliability and the 2002 IRPS workshop on Soft Errors. He also serves in the CEIT Research Institute advisory board.

Joe Steigerwald is an Intel Fellow and director of Chemical Mechanical Polish Technology, Intel Technology and Manufacturing Group. He is responsible for pathfinding, development, and transfer to high volume manufacturing of advanced chemical metal polish (CMP) and metals deposition modules for Intel's 32nm, 22nm, and 16nm logic and advanced memory technologies. Steigerwald originally joined Intel in 1988 as a fab etch engineer. He left for a brief time to pursue advanced electrical engineering degrees and has been with the company continuously since 1995. He has held a number of leadership roles in the company's Portland Technology Development organization, primarily in the CMP area. His work in CMP has lead to major advancements in this critical technology, enabling key elements of Intel's silicon process architecture. Steigerwald has written one book and one book chapter and hold three patents for advances in his CMP area of expertise. His work has appeared in more than a dozen journal publications and he has made numerous technical conference and workshop presentations. Originally from Upstate New York, Steigerwald received his bachelor's degree in electrical engineering from Clarkson University in 1988. He received his masters and doctorate degrees in electrical engineering from Rensselaer Polytechnic Institute in 1993 and 1995, respectively.

Karl G. Kempf is an Intel Fellow and Intel's Director of Decision Engineering. He currently focuses on product design decision problems in Intel's Digital Equipment Group, and previously was responsible for supply chain decision problems in Intel's Technology and Manufacturing Group. Kempf joined Intel in 1987 and is based in Phoenix, Arizona. He has been involved in designing and implementing decision policies for production scheduling, equipment maintenance, factory ramp management, equipment selection and layout, strategic and tactical production planning, inventory planning, demand forecasting, logistics operations and product design, as well as a wide variety of modeling and simulation projects. He has produced more than 50 internal publications. Kempf is a member of the National Academy of Engineering. He serves as adjunct professor at Arizona State University supervising graduate students in Mathematics, Computer Science, Industrial Engineering, and Supply Chain Management. Kempf has published more than 100 research papers in the external literature on various topics in heuristic and mathematical decision science, and has delivered keynote addresses at a number of national and international conferences. Prior to joining Intel, Kempf worked at McDonnell Douglas Corporation in St. Louis, Missouri, and Huntington Beach, California, where he was a member of the team that won the contract for automating the initial National Aeronautics and Space Administration Space Station. He worked previously at Pinewood Movie Studios in England where he participated in filming three Superman* movies, serving on the team that won an Academy Award* for special effects. While working for Ferrari in Italy (on loan from Goodyear), he was involved in winning three Formula I Gran Prix* World Championships. Kempf holds a B.S. in Chemistry, a B.A. in Physics, a Ph.D. in Applied Mathematics, and completed post-doctoral studies in Computer Science.

Kelin J. Kuhn is an Intel Fellow, Technology and Manufacturing Group and director of Advanced Device Technology. Kuhn is responsible for device architecture path finding for Intel's advanced process technologies. Kuhn joined Intel in 1997 working on Intel's 0.35 micron process technology. Since then, Kuhn has been involved in Intel's manufacturing process technology development for the 0.35 um, 130nm, 90nm, 45nm and 22nm technology nodes. Previously, Kuhn was a tenured faculty member in the Department of Electrical and Computer Engineering at the University of Washington. Kuhn is the past recipient of a National Science Foundation Presidential Young Investigator Award for her work on strained layer III-V materials and an Intel IAA award for her work on Hi-K metal gate transistors. Kuhn has six patents with four others pending, is the author of more than 60 technical papers, and has authored a textbook on laser engineering. Kuhn earned her bachelor's degree in electrical engineering from the University of Washington in 1980. Kuhn received her master's and doctoral degrees in electrical engineering from Stanford University in 1985.

Dr. Kevin Kahn is an Intel Senior Fellow, the corporation’s highest technical position, and Director of Communications Technology in Intel’s Corporate Technology Group, the corporate advanced development and research labs organization. His responsibilities include all communications technologies including radio, optical, and copper physical layer technologies, CMOS communications circuits work, packet processing, and higher layer protocols. Additionally, he helps drive communications strategies and policy for the corporation. Some of his primary current focuses are broadband access to the home, wireless LANs and PANs, spectrum policy, and related Internet issues. He also chairs the Intel Communications Research Council, which oversees research activities between Intel and academic programs. He currently serves on the Computer Science and Telecommunications Board of the National Research Council, the Department of Commerce Spectrum Management Advisory Committee, and on various academic advisory committees. He is a past member of the FCC Technological Advisory Council. In prior lab assignments Dr. Kahn has played a variety of roles in strategic and technical planning and research. These included managing large labs in operating systems and Internet communications. Dr. Kahn represents Intel in various industry consortia and various government policy forums. He has lectured widely at Universities in the U.S. and abroad about Intel and personal research activities. He previously served on the National Academy of Science Broadband Last Mile Study Panel, served as the co-chair of the Universal ADSL Working Group, an industry alliance dedicated to accelerating the deployment of consumer ADSL services for higher speed Internet access, and served as a Director of the DSL Forum. Dr. Kahn joined Intel in 1976 after completing a Ph.D. in Computer Science at Purdue University. Prior to that, he had received an M.S. in Computer Science from Purdue and a B.Sc. in Mathematics from Manhattan College. Throughout his long career with Intel, he has worked in system software development, operating systems, processor architecture, and various strategic planning roles. He has held both management and senior individual contributor roles. He holds multiple patents in processor architecture and communications technologies. Dr. Kahn is based at Intel’s facility in Hillsboro, Oregon.

Kevin Zhang is with logic technology development, where he is responsible for embedded memory technology development at Intel. Zhang is also responsible for developing high-speed and low-power circuits in embedded memory for future microprocessor and communication products. He has led the design and validation of technology vehicles from 90nm to 45nm technology generations. After joining Intel in 1997, Zhang worked on low-power technology for mobile CPUs and became a Principal Engineer in 2000 for his contributions in that area. Zhang holds 32 U.S. patents and has published 27 technical papers in the field of semiconductor technology and integrated circuits. He is a recipient of Intel Achievement Award in 2004 for his contribution to the development of 65nm SRAMs. Zhang currently is a member of Technical Program Committee of the International Solid-State Circuits Conference (ISSCC). Zhang received his B.S. degree from Tsinghua University in Beijing in 1987 and his Ph.D. from Duke University in 1994, both in electrical engineering.

Knut S. Grimsrud leads a research and development group responsible for mainstream and consumer storage interface definition and enabling. He is also responsible for developing new mainstream storage innovations for Intel platforms. Grimsrud and his team currently manage definition and ongoing evolution of the Serial ATA interface as well as the definition and industry enabling for the CE-ATA interface. He is also researching new applications of Flash in Intel platforms. Grimsrud joined Intel in 1993 as a hardware engineer in the Intel Architecture Labs where his primary focus was on improving the storage performance of Intel’s entry into the standard high-volume server segment. His focus transitioned to mainstream storage optimization techniques in the Platform Architecture Labs where his contributions included disk reorganization techniques for improved application launch performance. Grimsrud then drove definition of the Serial ATA disk drive interface standard and its subsequent evolutions and enhancements, which continues today under his group in the Storage Technologies Group. Grimsrud received his bachelor’s degree in electrical engineering in 1988, his master’s degree in electrical and computer engineering in 1989 and his Ph.D in 1993, all from Brigham Young University. Grimsrud holds 23 U.S. patents and has received three Intel Achievement Awards and a Lifetime Achievement Award from Intel IDF. He serves as chairman of the board of directors for the Serial ATA International Organization and chairman of the steering committee of the CE-ATA Working Group.

Krishnamurthy Soumyanath (Soumya) is an Intel Fellow and director of the Communications Circuits Research, part of the Corporate Technology Group. Soumya joined Intel in 1996, working in the Circuits Research Laboratory and leading the high-performance circuits research group. His team developed several high-speed data path components used in microprocessors. During his Intel career, Soumya has held a number of engineering and management positions in the area of semiconductor circuit design. He has published more than 50 papers and has had more than 30 patents issued. He is currently responsible for leading research and development activity on circuits and architectures for next-generation transceiver devices. His team’s efforts are focused on increasing the abilities of digital processing in wired and wireless communications systems and in making them compatible with scaled CMOS devices. Soumya earned his bachelor’s degree in electrical engineering from the National Institute of Technology in Tiruchirappalli, India in 1979 and his master’s degree in the same discipline in 1985 from the Indian Institute of Science, Bangalore. He received his Ph.D. in computer science and engineering from the University of Nebraska in 1993.

Mario J. Paniccia is an Intel Fellow and director of the Photonics Technology Lab. Paniccia joined Intel in 1995 as a lead researcher developing a novel optical testing technology for probing transistor timing in microprocessors. Today this optical testing technology is the standard in the industry. During his tenure at Intel he also served as a senior manager in the Intel Research organization focused on developing technologies in the areas of optical clocking, optical interconnects and optical communications. He currently directs a group in the area of Silicon Photonics. The team is focused on developing silicon-based photonic building blocks for future use in enterprise and data center communications. His team has pioneered activities in silicon photonics that have led to the development of the first silicon modulator with bandwidth greater than 1GHz in 2004, the first continuous wave silicon laser breakthrough in 2005 and the first electrically pumped hybrid silicon laser in 2006 in collaboration with the University of California, Santa Barbara. Scientific American named Paniccia one of 2004’s top 50 researchers for leading his team’s work in the area of silicon photonics. He has received two Intel Achievement Awards, has published more than 47 papers, including three book chapters, and has more than 67 patents issued or pending. Paniccia earned a bachelor’s degree in physics in 1988 from the State University of New York at Binghamton and a Ph.D. in solid state physics from Purdue University in 1994.

Mark T. Bohr is an Intel Senior Fellow and Director of Process Architecture and Integration. He works in Intel's Logic Technology Development group located in Hillsboro, Oregon, where he is responsible for directing process development activities for Intel's advanced logic technologies. He joined Intel in 1978 and has been responsible for process integration and device design on a variety of process technologies for dynamic RAM, static RAM and microprocessor products. The technologies that he has helped to develop include: Intel's first CMOS technology in 1981, the world's first CMOS DRAM technology in 1983, Intel's first BiCMOS logic technology 1992, and recent 90 nm and 65 nm logic technologies using strained silicon transistors and copper + low-k interconnects. He is currently directing development activities for Intel's 45 nm logic technology. Bohr was born in Chicago, Illinois in 1953. He received the B.S. degree in industrial engineering in 1976 and the M.S. degree in electrical engineering in 1978, both from the University of Illinois, Urbana-Champaign. In 1998 he received the Distinguished Alumnus Award from the University of Illinois department of Electrical and Computer Engineering. He serves as the senior sponsor for the University of Illinois campus for Intel's Academic Relations group. Bohr is a Fellow of the Institute of Electrical and Electronics Engineers and was the recipient of the 2003 IEEE Andrew S. Grove award. He has served on paper selection committees for the International Electron Devices Meeting ('90-'91 and '96-'97) and for the Symposium on VLSI Technology ('94-'99) and presently serves on the Executive Committee for the VLSI Symposia. In 2005 he was elected to the National Academy of Engineering. He holds 31 patents in the area of integrated circuit processing and has authored or co-authored 39 published papers.

Matthew J. Adiletta is an Intel Fellow and Director of Communication Infrastructure and Architecture in the Digital Enterprise Group, based in Massachusetts. Adiletta joined Intel in 1998. He led the completion of the Intel® IXP1200 network processor and subsequently developed the Intel® IXP2XXX network processor product line. Adiletta is currently driving the next-generation of network processors for greater packet processing capability and security in future Internet, wireless and enterprise equipment. He holds 46 patents, with more than 44 patents pending. Prior to joining Intel, Adiletta worked at Digital Equipment Corporation where he was responsible for developing high-speed microprocessors and video compression chips. Adiletta led the development of Digital's first-generation network processor in 1996. Adiletta graduated with honors from the University of Connecticut with a bachelor's degree in Electrical Engineering in 1985. He was born in Greenwich, Conn.

Neal R. Mielke is an Intel Fellow in the Technology and Manufacturing Group and Director of Reliability Methods. Mielke is responsible for characterizing the reliability of new Intel silicon technologies. He joined Intel in 1979 and worked in quality and reliability for non-volatile memories such as EPROMs, E2PROMs and flash. He later worked in the development of non-volatile memories including Intel's original flash products and on the reliability of Intel's logic technologies. Mielke received a bachelor's degree in physics and an master's degree in electrical engineering from Stanford University in 1979. Born in Palo Alto, Calif., he has 19 patents, 14 publications and four Intel Achievement Awards.

Ofri Wechsler is an Intel Fellow in the Mobility Group and director of Mobility Microprocessor Architecture at Intel Corporation. In this role, Wechsler is responsible for the Yonah and Intel® Core™ microarchitectures, and is actively working on future generations. Previously, Wechsler served as platform architect for the Timna platform. He also served as manager for the Israel Design Center Architecture Validation team, responsible for the validation of the P55C version of the Intel® Pentium® processor. Wechsler joined Intel in 1989 as a design engineer for the i860. Wechsler received his bachelor’s degree in electrical engineering from Ben Gurion University, Beer Sheva, Israel, in 1989. He has four U.S. patents.

Dr. Paolo Gargini is the Director of Technology Strategy for Intel Corporation. Dr. Gargini is also responsible for world-wide research activities conducted outside Intel for the Technology and Manufacturing Group by consortia, institutes and universities. Dr. Gargini was born in Florence, Italy and received a doctorate in Electrical Engineering in 1970 and a doctorate in Physics in 1975 from the Universita di Bologna, Italy, both with full honor and marks. He has done research at LAMEL in Bologna, Stanford Electronics Laboratory, and Fairchild Camera and Instrument Research and Development in Palo Alto from 1970 to 1977. Since joining Intel in 1978, Dr. Gargini has conducted studies on Process Reliability; he was responsible for developing the building blocks of HMOS III and CHMOS III technologies used in the 1980's for the 80286 and the 80386 processors. In 1985 he headed the first submicron process development team at Intel. Dr. Gargini has been the Chairman of the Executive Steering Council (ESC) of I300I and, subsequently, of International Sematech from 1996 to 2000. He is now a member of the Sematech Board. Since 1998, Dr. Gargini has been the Chairman of the International Technology Roadmap for Semiconductors (ITRS). He is a member of various technical committees and technical advisory boards for organizations such as the Semiconductor Research Corporation (SRC), and the Technology Strategic Council (TSC) of the SIA in the US, IMEC in Europe, ASET and MIRAI in Japan. He also heads the International EUV Initiative (IEUVI), formed in 2001, that fosters cooperation and coordination among the largest EUV consortia in the world. Dr. Gargini is the facilitator of the International Consortia Cooperation Initiative (ICCI). This initiative, started in 2000, fosters exchange of information among a selected group of leading consortia and institutes in the world. In September 2003, Dr. Gargini was included by EE Times in a very selected group of Influencers of the semiconductor industry with the following motivation: "EE Times has chosen 13 people who are influencing the course of semiconductor development technology and taking it into realms that exceed the bounds set by the inventors of the transistor more than 50 years ago. With more than 25 years in the industry, Gargini is helping to navigate tough process and manufacturing waters." Dr. Gargini initiated and became the first Chairman of the Governing Council of the Nano Electronics Research Initiative (NERC) funded in June 2005 by SIA. This Initiative is aimed at supporting and focusing research in universities towards subsequent commercialization of Nanoelectronics. NERC actively cooperates in this effort with USG organizations such as NNI, NSF, DARPA, and NIST. Dr. Gargini was elevated to IEEE Fellow in 2008.

Patricia Murray is senior vice president and director of Intel Corporation’s Human Resources. She is responsible for ensuring the company hires, develops and retains the best and brightest employees in the industry globally. She is also responsible for providing world class technology-based support and service to Intel's 80,000+ employees worldwide. Murray first joined Intel in 1990 as an attorney in the Human Resources' legal staff. She was promoted to manager of the Human Resources' legal staff in 1992, a position she held until her promotion to vice president and director of Human Resources in 1996. Murray has been a corporate vice president since 1997. Prior to joining Intel, Murray was an attorney at the law firm of Morrison and Foerster in Palo Alto, Calif., where she specialized in employment litigation and counseling. Prior to her legal career, Murray was an intensive care unit nurse and nursing administrator at the University of Michigan Hospitals. Murray was born in Detroit, Mich., and received a B.A from Michigan State University, a B.S. from Saint Louis University and a J.D. at the University of Michigan in 1986.

Peter MacWilliams is an Intel Senior Fellow, Digital Enterprise Group, and Director of Staff Platform Architect. He is responsible for future platform directions. This role involves coordination of platform architectures and technologies both internally and with the industry. MacWilliams' primary focus areas are platform partitioning, memory technologies, cache technologies and interconnects. During his career at Intel, MacWilliams has been involved with many bus and chipset architectures. He began his career working on analog I/O boards for the Multibus™ architecture. He was a key contributor to several buses in the Multibus™ family as well as the PCI bus and CPU buses beginning with the 80386. In addition he developed platform architectures and high-speed cache solutions for the 80386, 80486, the Pentium® processor and the Pentium® II processor. MacWilliams also worked with the memory industry to drive the performance of SDRAM, RDRAM and DDR RDRAM to keep pace with platform demands. MacWilliams joined Intel in 1979 as a design engineer after receiving his master's in electrical engineering from U.C. Berkeley. He has been an Intel Fellow since 1990 and an Intel Senior Fellow since 2002.

Dr. Raj Yavatkar is an Intel Fellow and Director of the System-on-Chip (SoC) Architecture. He leads the development of modular design and validation technologies to enable high-integration SoC products with a quick turn-around time. Dr. Yavatkar has held several positions at Intel including leading platform validation architecture for Intel's CPU and chipset products. He led the formation of the Systems Technology Lab involved in advanced R&D in the areas of system architecture and platform technologies. From 1999 through 2004, he was the Chief Software Architect for Intel's IXP family of network processors. At Intel, Dr. Yavatkar also led Intel's advanced research and development activities in internet quality of service and programmable networks. He designed a framework for policy-based network management that led to development of Internet standards. Dr. Yavatkar is an IEEE Fellow and is recognized as a leading expert in the networking industry. He received his Ph.D. in Computer Science from Purdue University in 1989 and holds fourteen patents, with more than 20 pending. He was the General Chair of ACM Sigcomm 2004 and ACM/IEEE ANCS 2007. Raj has authored or co-authored five Internet standards. Dr. Yavatkar has also published more than 40 papers in academic journals and conferences and has co-authored the book, Inside the Internet's Resource Reservation Protocol (RSVP) published by John Wiley. Raj serves on the editorial board of the IEEE Network magazine and previously served as an editor of Computer Communications, ACM/Springer-Verlag Journal on Multimedia Systems and Kluwer’s Multimedia Tools and Applications. He also served as Vice-Chairman of the Network Processing Forum, which developed standards for the network processing industry. Before he joined Intel, Raj was a tenured Associate Professor at the University of Kentucky and a Visiting Research Professor at the International Computer Science Institute and the University of California-Berkeley.

Rajesh Kumar leads circuit and power technology development for IA 32 microprocessors in the Digital Enterprise Group (DEG) and is currently directing work on Intel’s lead 45nm and 32nm microprocessors. Kumar is DEG’s interface to process technology for microprocessors and manages the circuit technology group. Since coming to Intel in 1992, Kumar worked on design of the X86 instruction decoder for the P6, which became the Intel® Pentium® Pro, Pentium® II and Pentium® III processors. He focused on robust chip design in presence of signal integrity, crosstalk, inductance and noise for the Pentium 4, and company-wide. Kumar was the founding chair of Intel’s task force on cross capacitance and led the development of the first transistor level noise analysis tool in the industry used on commercial microprocessors. He designed the industry’s first test chip to measure on-chip signal inductance using active busses. From 2000 to the present, Kumar and his team have developed 14 new technologies in areas such as circuits, I/O, clocking, power technologies, power efficient computing, among others. Kumar delivered the keynote at the MARCO/GSRC conference on power consumption in microprocessors at Stanford in 2004. He was a panelist on frequency limit of microprocessors at the IEEE VLSI Symposium in 2004. Kumar received a master’s degree from California Institute of Technology in 1992 and a bachelor’s from the Indian Institute of Technology in 1991, both in electrical engineering.

Mooney, 47, is an Intel Fellow and director of I/O research in Intel's Microprocessor Technology Lab, part of Intel's Corporate Technology Group. Mooney joined Intel is 1992 and is responsible for circuit and interconnect research for multi-gigabit, chip-to-chip connections on microprocessor platforms. Mooney has been instrumental in driving consolidation of Intel's processor platform interconnect road map and pioneered fundamental circuit technology used in technologies such as PCI Express*. He has authored several technical papers and is listed as an inventor or co-inventor on 39 patents. Mooney previously worked in Intel's former Supercomputer Systems Division, developing interconnect components for parallel processor communications. He also developed a method of bidirectional signaling that was used for the interconnect in Intel's Teraflop supercomputer. Prior to joining Intel, Mooney developed products in bipolar, CMOS, and BiCMOS technologies for Signetics Corporation. He received an M.S.E.E. degree from Brigham Young University in Utah.

Richard Lee Coulson is the Director of I/O Architecture in the Storage Technologies Group. His responsibilities include the conception and implementation of new storage devices based on solid state memory. These devices are designed to break the storage performance bottleneck that hampers many computer applications, while lowering power consumption and total cost of ownership. His group is also responsible for architecture and performance analysis of emerging I/O devices and interfaces, including the SATA storage interface, network adapters, and serial interfaces. His group finds and addresses performance bottlenecks and issues related to I/O that could limit the performance or capabilities of the PC platform. Coulson was born in New York City in 1956. He received his bachelor's degree in Electrical Engineering and Computer Science from University of Colorado in 1980 and his master's degree in Electrical Engineering from Stanford in 1983. Upon graduation, Coulson was a Development Engineer at Storage Technology Corporation. He became a Senior Engineer at Intel in 1983, was promoted to Staff Engineer in 1987, was transferred to BiiN in a joint venture between Intel and Siemens as I/O engineering Manager in 1988, became I/O Engineering Manager for Sequent Computer Systems Inc. in 1989, and rejoined Intel in 1993 as Manager of the I/O Architecture Group, Platform Architecture Labs. He was named an Intel Fellow in 1997, and an Intel Senior Fellow in 2006. Coulson was awarded the Intel Achievement Award four times: in May 1986 for the development of a new I/O subsystem, again in 1996 for revolutionizing the I/O capabilities of the Standard High Volume Server, in 1998 for the Intel Application Launch Accelerator, and in 2007 for developing core technologies for using non volatile memory in Intel platforms. He holds more than 40 Patents.

Robert S. Chau is an Intel Senior Fellow and director of transistor research and nanotechnology in Intel's Technology and Manufacturing Group. Chau is responsible for directing research and development in advanced transistors and gate dielectrics, process modules and technologies, and silicon integrated processes for microprocessor applications. He is also responsible for leading research efforts in emerging nanotechnology for future nanoelectronics applications. Chau joined Intel in 1989, became an Intel Fellow in 2000 and an Intel Senior Fellow in 2005. During his career at Intel he developed nine generations of Intel gate dielectrics, including the high-K/metal-gate, along with many transistor innovations and process technologies used in various Intel manufacturing processes and microprocessor products. He also introduced many new process modules and novel device nanotechnologies for Intel's future logic processes. Chau received his bachelor's and master's degrees and Ph.D. in electrical engineering from The Ohio State University. He holds more than 110 issued U.S. patents and has been elected an IEEE Fellow.

Shekhar Y. Borkar is an Intel Fellow, Corporate Technology Group and Director of Microprocessor Technology Lab. Borkar is responsible for directing research in technologies for Intel's future microprocessors. Borkar joined Intel in 1981. He worked on the design of the 8051 family of microcontrollers, iWarp multicomputer and high-speed signaling technology for Intel supercomputers. Borkar is an adjunct member of the faculty of the Oregon Graduate Institute. He has published over 60 articles and holds 41 patents. Borkar was born in Mumbai, India. He received a master's degree in Electrical Engineering from the University of Notre Dame in 1981, and a master and bachelor degrees in Physics from the University of Bombay in 1979.

Shivnandan (Shiv) Kaushik is an Intel Fellow, Software and Services Group and director of Systems Software. Kaushik directs work on the definition and optimization of platform and firmware interfaces to operating systems and core virtualization software. Kaushik joined Intel in 1995 as a senior software engineer and has served in a number of software engineering and management roles. He is an expert in the design of platform hardware and firmware interfaces to operating systems and virtualization software. In this role, he has made optimizations for features introduced on Intel processors since the Pentium Pro and contributions to industry standard firmware specifications. Kaushik holds 16 patents with 28 patents pending in the areas of system software and platform architecture. He has received three Intel Achievement Awards. Kaushik received a bachelor's degree in computer science and engineering from the Indian Institute of Technology, Bombay in 1990. He earned his master's degree and doctorate in computer and information science from The Ohio State University in 1991 and 1995, respectively.

Shreekant (Ticky) Thakkar is an Intel Fellow, Mobility Group and director, UMG Platform Architecture. In this role, Thakkar serves as the lead architect for the Mobile Internet Device Platform, a computing and communications device representing a strategic growth area for Intel. Thakkar joined Intel in 1993 as the P6 Multiprocessor architect. He has held several architecture and engineering management positions at the company in the areas of multiprocessor, CPU, mobile computing and low power architecture. Previously, Thakkar held positions with Sequent Computer Systems, the Oregon Graduate Institute and Metheus Corp. Thakkar holds 64 patents with another 15 patents pending, and has published 29 technical papers. He received his bachelor's degree in statistics and computer science from the University of London in 1977. Thakkar earned masters and doctoral degrees from the University of Manchester in computer science in 1978 and 1982, respectively.

Simcha Gochman is an Intel Fellow and director of Future Mobile CPU Architecture for the Intel Mobility Group. Gochman joined Intel in 1984 as a designer for the Intel 387 math co-processor. He has held a variety of leadership roles in the areas of processor design and architecture during his career with Intel including serving as chief architect for the Intel® Pentium M processors code-named Banias, Dothan and Yonah. His work in this area paved the way for Intel leadership in microprocessor power efficiency and serves as the basis for current product designs. Intel’s Micro-architecture Advanced Development team is currently lead by Gochman. The group is charged with responsibility for micro-architecture definition activities for future mobile processors. Gochman received his bachelor’s and master’s degrees in electrical engineering from the Technion (Israeli Institute of Technology) in 1980 and 1984, respectively.

Swaminathan "Sam" Sivakumar is an Intel Fellow and director of Lithography in Intel's Portland Technology Development Group in Oregon. He is responsible for the definition, development and deployment of Intel's next generation lithography processes. Sivakumar joined Intel in 1990 and throughout his career with the company has worked in the lithography area on photoresists, patterning equipment and process development. He has contributed to lithography development, characterization and transfer to high-volume manufacturing of every submicron process technology generation at Intel since 1990. He co-invented industry-leading interconnect patterning techniques for aluminum metallization on the 180 nanometer process as well as for dual-damascene copper metallization on the 130 nanometer and newer processes. Sivakumar received his bachelor's degree in electrical engineering from the Indian Institute of Technology in Madras, India in 1987. He received his master's degree, also in electrical engineering from the University of Illinois at Urbana-Champaign two years later. Sivakumar has received three Intel Achievement Awards for his work on P854 speed performance and for development of advanced aluminum and dual-damascene copper interconnect processes. He has published 14 papers on semiconductor processing. He holds 10 patents on lithography and patterning with another 13 patents pending. Sivakumar was born in 1966 in Madras, India.

Tahir Ghani is an Intel Fellow and director of transistor technology and integration for the Technology and Manufacturing Group. He is currently leading the Pathfinding team responsible for transistor design and front-end processor integration for Intel's 22nm CMOS logic technology node. Since joining Intel in 1994, Ghani has played a key role in developing world-class CMOS logic technologies. He has led the research and development teams responsible for introducing some of the most important innovations in transistor technology and implementing these into mainstream CMOS manufacturing. Ghani co-led the team responsible for developing industry-first HiK/Metal Gate CMOS transistor technology for Intel's 45nm technology node. Prior to that, he led the integration team which was responsible for developing industry-first uniaxially strained silicon transistors for Intel's 90 CMOS node. Ghani and co-workers were the first to publish a novel epitaxial SiGe source drain transistor at IEDM 2003 which introduced high levels of strain for significant PMOS mobility enhancement. As a member of the 22nm CMOS Pathfinding team at Intel, Ghani is currently leading 22nm CMOS transistor technology research and development. Ghani has received two Intel Achievement Awards. The first, awarded in 1996, was for his role in developing leading-edge 0.25um CMOS transistor technology. He received the second in 2003 for developing uniaxially strained silicon transistor technology for Intel's 90nm logic technology node. He has published more than 30 technical papers, many of which have been presented at leading technical conferences. Ghani received his B.S. in electrical engineering at the University of Engineering and Technology in Lahore, Pakistan in 1984 and his Ph.D. in electrical engineering at Stanford University in 1994. He is a Fellow of IEEE.

Thomas Piazza is an Intel Fellow and director of Graphics Integrated Chipset Architecture. He is responsible for definition of features as well as cost, performance and implementation of all graphics-related functions for mainstream integrated graphics controllers. Piazza joined Intel in February 1997. Prior to joining Intel, he was chief engineer at Lockheed Martin where he was responsible for graphics development, including the jointly developed Intel740™ Graphics Accelerator. Previous to that, Piazza was involved in various technical roles during a 17-year career with General Electric's flight simulator business. Piazza received a bachelor's degree in electrical engineering from Pratt Institute in 1978. He holds 17 patents relating to graphics algorithms and memory arbitration.

Tryggve Fossum is an Intel Fellow, Digital Enterprise Group, and Director of Microarchitecture Development. He is the lead architect for the next generation Xeon server and Intel's advanced multiprocessing chip architecture. Fossum joined Intel as part of a June 2001 agreement with Compaq Computer Corporation that called for the transfer of microprocessor engineering and design expertise to Intel. Prior to joining Intel, Fossum held a variety of positions during 28 years of combined service to Compaq and Digital Equipment Corporation. Since 1998, he served as a Compaq Fellow and was lead architect for future versions of the Alpha microprocessor. From 1991 to 1998, Fossum led a team conducting processor and compiler technology research. Prior to this, he was a consulting engineer and helped design several VAX processors for Digital. Fossum received a Cand Mag degree in Science from the University of Oslo in 1968.He earned his doctorate and master's degree in mathematics from the University of Illinois in 1972 and 1970, respectively. Fossum completed a post-doctorate program at the University of Illinois in 1973. Fossum holds 30 patents on various aspects of computer design, including floating point, multithreading and cache organization technologies.

Valluri Rao is an Intel Fellow and Director of Analytical and Microsystems Technology in Intel's Technology and Manufacturing Group. He is currently responsible for the research and development of novel microsystems applications for Intel. Dr. Rao joined Intel in 1983 and pioneered numerous silicon characterization techniques for microprocessor performance, debug and yield enhancement. Some of these techniques included electron beam based and uUltra-fast optical measurement from microprocessors and silicon micromachining methods for on chip reconfiguring and repairing of circuits for product validation. In addition, these tools and methods were refined to work with flip chip packaging when Intel transitioned to this packaging technology. The tools and related infrastructure, which included integration into Intel's physical CAD environment, were widely deployed throughout Intel to all of the design centers, analytical labs, assembly and test sites and manufacturing facilities. He worked on Intel microprocessors starting from the 80386 to the first generation of Itanium processors. Rao was named an Intel Fellow in 2000. Beginning in 2001, Rao initiated Intel's MEMS work by establishing a research and development team to develop reconfigurable RF front end systems for multi radio coexistence. To enable this, advanced RF MEMS switches and novel silicon integration schemes were developed. A key current area of focus is the integration of novel microsystems with CMOS. He also initiated Intel's early work on optical interconnects and lead Intel's first Opto-Electronics research committee for overseeing University based optical research. Rao holds 68 issued patents, with 36 more pending. He has earned three Intel achievement awards and has published more than 20 external and 10 internal papers. Rao received his Bachelor, Masters and Doctorate degrees in Electrical Engineering from Jesus College, Cambridge University. He was a post-doctoral research fellow at the Cambridge University Engineering Department from 1979 - 83. He was born in Andhra Pradesh, India.

Vivek K. De is an Intel Fellow and director of Circuit Technology Research in the Corporate Technology Group. De joined Intel in 1996 as a staff engineer in Intel’s Circuits Research Lab (CRL). Since that time he has led research teams in CRL focused on developing advanced circuits and design techniques for low-power and high-performance processors. In his current role, De provides strategic direction for future circuit technologies and is responsible for aligning Intel’s circuit research with technology scaling challenges. De has published more than 140 technical papers and holds 114 patents with 72 patents pending. He received an Intel Achievement Award for his contributions to a novel integrated voltage regulator technology. Prior to joining Intel, De was engaged in semiconductor devices and circuits research at Rensselaer Polytechnic Institute and Georgia Institute of Technology, and was a visiting researcher at Texas Instruments. De received his bachelor’s degree in electrical engineering from the Indian Institute of Technology in Madras, India in 1985 and his master’s degree in electrical engineering from Duke University in 1986. He received a Ph.D. in electrical engineering from Rensselaer Polytechnic Institute in 1992.

Vivek Singh is an Intel Fellow and director of computational lithography in Intel's Technology and Manufacturing Group. He is responsible for all of Intel's CAD and modeling tool development in full chip OPC, lithography verification, rigorous lithography modeling, next-generation lithography selection, inverse lithography technologies and double patterning. He also represents Intel on several external Design for Manufacturability (DFM) forums, and is currently chairman of the SPIE DFM Conference. Singh joined Intel in 1993 as a modeling applications engineer, was appointed team leader for the Resist and Applications Group in 1996, and was appointed overall leader of the Lithography Modeling Group in 2000. He holds 13 patents, has published 38 technical papers and won the Intel Achievement Award in 2007. Singh graduated from the Indian Institute of Technology in Delhi with a bachelor's degree in chemical engineering in 1989. He earned a master's degree in chemical engineering in 1990, a Ph.D. minor in electrical engineering in 1993, and a Ph.D. in chemical engineering in 1993, all from Stanford University.

Yan Borodovsky is an Intel Senior Fellow and Director of Advanced Lithography in Intel's Technology and Manufacturing Group, responsible for directing Intel's multi-generational advanced lithography definition and progress. Borodovsky has been involved in the development of lithography tooling and advanced patterning techniques since he joined Intel in 1987 as a staff engineer. He was appointed Intel Fellow in January 1999 and Intel Senior Fellow in November of 2003. Borodovsky was born in Kharkov, Ukraine, in 1947. He received master's degree in Solid State Devices and Physics from Politechnical Institute in Tula, Russia, in 1971. After graduation, he joined the Nuclear Research Institute of the Ukrainian Academy of Science, Kiev, as an engineer involved in the research and development of solid state spectrometers of nuclear radiation. He left the former Soviet Union in 1979 and started his work at Syncal Corporation developing high-temperature semiconductor materials for deep space thermoelectric conversion devices. In 1982, Borodovsky joined Advanced Micro Devices as Lithography Staff Engineer. In 1985, Borodovsky moved to Oregon to join ATEQ Corporation, where he designed and developed optical systems and optical testing equipment for the original CORE 2000 Laser Writer. Borodovsky has authored numerous technical publications and holds 16 US patents.

Anand Chandrasekher is senior vice president and general manager of Intel Corporation's Ultra Mobility Group. This group is responsible for low power Intel® Architecture products, ultra-mobile PC's, mobile internet devices, smart mobile and hand-held market segments. Chandrasekher's responsibilities include strategic direction, platform planning, design, development, marketing and business management for this segment. Chandrasekher's team is responsible for developing the technologies behind the Intel® Atom™ processor and Intel® Centrino® Atom™ processor product families. Prior to his current assignment, Chandrasekher was senior vice president and general manager of Intel's Sales and Marketing Group; in this capacity, he had responsibility for worldwide sales and marketing operations and served Intel's global customer and market needs. Previously, Chandrasekher was vice president and general manager of the Mobile Platforms Group. Chandrasekher led the team responsible for the architecture, design, development and marketing of Intel's platform solutions for the mobile computing segment. He led the team that delivered Intel® Centrino® Processor Technology to the market; and, under his leadership the mobile group became the fastest growing business unit at Intel. He was promoted to Intel corporate vice president in 2003. Prior to his Mobile Platforms Group role, Chandrasekher was vice president of the Intel Architecture Group and general manager of the Intel Architecture Marketing Group, where he led strategic planning and marketing activities for Intel's enterprise, mobile and desktop platform products – in this capacity, he was responsible for the launch and ramp of the Intel® Pentium® 4 processor family of products. In 1997, Chandrasekher formed and led Intel's Workstation Platform Group and was its general manager through 1999 – under his leadership, Intel's workstation business grew into a multi-billion dollar business. From 1995 to 1997 he served as technical assistant to Craig Barrett, current Intel Chairman of the Board. Chandrasekher earned his bachelor's degree in computer science and a master's degree in engineering from Cornell University. He received an MBA from Cornell's Johnson Graduate School of Management. Chandrasekher remains an active supporter of Cornell's programs and of the American India Foundation; he is an elected member of Cornell's Council of Trustees. He has been with Intel since 1988.

Pat joined Intel in 1979, and has held a variety of research, development and general management positions at the company, including responsibility for the Intel 486? and Pentium Pro processor families and management of Intel's Desktop Products Group. He most recently served as CTO of the Intel Architecture Group. He has a master's degree in electrical engineering from Stanford University and holds six patents in the areas of VLSI design, computer architecture and communications.

Bruce Sewell is senior vice president and general counsel of Intel Corporation. His management responsibilities include legal, corporate affairs, and Intel's corporate social responsibility programs which ensure Intel's positive worldwide impact on education, the environment and in our communities. As general counsel, he supervises a team of roughly 600 attorneys and policy professionals located in over 30 countries around the world. Sewell also represents Intel on several professional, legislative and policy boards in the United States and abroad. Mr. Sewell has been profiled in Fortune Magazine and was recognized in 2006 as one of the 100 Most Influential Lawyers by California Lawyer magazine and the legal Daily Journal. Mr. Sewell is a frequent contributor and lecturer in the areas of global business development, innovation economies, international competition, and intellectual property rights. Sewell joined Intel in 1995 as a senior attorney assigned to counsel various business groups in areas such as antitrust compliance, licensing, and intellectual property. In 2001, Sewell was promoted to vice president and deputy general counsel. In that role he managed Intel's litigation portfolio, and handled corporate transactions, including M&A activities. Sewell took over as only the third general counsel in Intel's history in November 2004. Prior to joining Intel, Sewell was a partner in the litigation firm of Brown and Bain PC where he handled such notable cases as the landmark fight between Apple Computer and Microsoft Corporation over copyright ability of the Macintosh Graphical User Interface. Sewell was admitted to the California Bar in 1986 and to the Washington D.C. Bar in 1987. He is also admitted to practice before the United States Court of Appeals for the Federal Circuit. Sewell received his J.D. from George Washington University in 1986, and a Bachelor of Science degree from the University of Lancaster, in the United Kingdom, in 1979.

John Crawford is an Intel Fellow, Digital Enterprise Group, and sets the architectural direction for emerging power and reliability technologies for future Intel® Processor Server platforms. When Crawford joined Intel as a new college graduate in 1977, he worked as a software engineer developing software tools for Intel's 8086 processor; including the code generation phase of Intel's Pascal compiler for the 8086. In 1982, he became the Chief Architect for the Intel386™ microprocessor. He was responsible for defining the company's 32-bit architectural extensions to the already successful 8086/186/286 16-bit product line. In this capacity, he set the architectural direction and later participated in the design of the processor by leading the microprogram development and test program generation. Crawford made similar contributions as Chief Architect of the Intel486™ processor. Crawford co-managed the design of the Pentium® processor up through a successful product launch in 1993. Crawford headed the joint Architecture Research with Hewlett-Packard that developed the Itanium family architecture, Intel's 64-bit Enterprise product line. He has been involved with the Itanium family of products since its inception in 1994. In 1995, Crawford received the ACM/IEEE Eckert-Mauchly Award for contributions to computer and digital systems architecture. Crawford received the IEEE Ernst Weber Engineering Leadership Recognition in June 1997. He was elected to the National Academy of Engineering in 2002. Crawford received a bachelor's degree in Computer Science from Brown University in 1975, and a master's degree in Computer Science from the University of North Carolina, Chapel Hill, in 1977. Crawford holds 23 patents.

Ambassador Charlene Barshefsky has been a director of Intel since January 2004 and is Senior International Partner at Wilmer Cutler Pickering Hale and Dorr LLP. Formerly the United States Trade Representative, Ambassador Barshefsky was the chief trade negotiator and principal trade policy maker for the United States from 1997 to 2001 and a member of the President's Cabinet. Ambassador Barshefsky serves on the corporate Board of Directors of the American Express Company; The Estee Lauder Companies Inc. and Starwood Hotels & Resorts Worldwide, Inc. She is also a member of the Board of Directors of the Council on Foreign Relations.

David S. Pottruck has been a director of Intel since 1998. Mr. Pottruck is Chairman and Chief Executive Officer of Red Eagle Ventures, Inc., a San Francisco private equity firm. He is also Chairman of Eos Airlines, a new airline focusing on premium traffic across the North Atlantic corridor. Mr. Pottruck also serves as a Senior Fellow in the Wharton School of Business Center for Leadership and Change Management. In July of 2004, Mr. Pottruck resigned after a 20-year career having served as President, Chief Executive Officer and a member of the Board of the Charles Schwab Corporation.

Jane E. Shaw has been a director of Intel since 1993 and is Chairman of the Audit Committee of the Board. Dr. Shaw retired in June 2005 from the position of Chairman of the Board and Chief Executive Officer of Aerogen, Inc., a company developing drug-device combination aerosol products for patients with respiratory disorders. She was President and Chief Operating Officer of ALZA Corporation, a pharmaceutical company from 1987 to 1994. Dr. Shaw is a director of McKesson Corporation.

John Donahoe became President and CEO of eBay Inc. on March 31, 2008. In this role, John has global responsibility for growing each of the company's business units, which include eBay Marketplaces, PayPal and Skype. John came to eBay in February 2005 as President of eBay Marketplaces, responsible for all elements of eBay's global ecommerce businesses. In this role, he focused on expanding eBay's core business, which accounts for a large percentage of the company's revenues. John also oversaw a number of strategic acquisitions, including Shopping.com and StubHub, and classifieds sites, such as Gumtree and LoQUo. During the three years he served as President of Marketplaces, revenues and profits for this division doubled. Prior to eBay, John spent more than 20 years at Bain & Company, a worldwide consulting firm based in Boston. Starting as an Associate Consultant, John rose to become the firm's CEO, where he oversaw Bain's 30 offices and 3,000 employees. In addition to serving on eBay's Inc.'s Board of Directors, John is also on the Board of Trustees of Dartmouth College. John received a Bachelor of Arts in Economics from Dartmouth College and an MBA from the Stanford Graduate School of Business.

Reed E. Hundt is an advisor on information industries to McKinsey and Company, a worldwide management consulting firm. His work with McKinsey has focused on helping senior management and boards address a wide range of strategic and other leadership challenges. He also serves on the board of directors of three publicly traded companies, Allegiance Telecom, Inc., Expedia, and Intel Corp. He is a special advisor to Blackstone Group, a New York-based private equity firm, and a venture partner at Benchmark Capital, a venture capital firm based in Menlo Park, California, specializing in investments in high-tech companies. He teaches a seminar cross-listed at the Yale Law School and the Yale School of Management, where he serves as a member of the advisory committee. Hundt served four years as Chairman of the Federal Communications Commission (FCC), from 1993 to 1997. He also helped negotiate the World Trade Organization Telecommunications agreement, opening markets in 69 countries to competition and dropping barriers to foreign investment. He is especially proud of his role in making the largest single national commitment to K-12 education in America's history: the Snowe-Rockefeller program that dedicates more than $2 billion annually to connect all classrooms in the country to the Internet. Hundt is the author of, "You Say You Want A Revolution: A Story of Information Age Politics." (Yale University Press, 2000). He has also been Co-Chairman of The Forum on Communications and Society at The Aspen Institute.