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	<title><![CDATA[prodesign Resources | BNET]]></title>
	<link><![CDATA[http://resources.bnet.com/topic/prodesign.html]]></link>
	<description><![CDATA[White papers, case studies, business articles, and blog posts relating to prodesign]]></description>
	<s:counts start="0" returned="20" found="33" />
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		<title><![CDATA[ProDesign Launches the CHIPit Iridium Prototyping Suite]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2008_March_10/ai_n24380976]]></link>
		<description><![CDATA[Complete and Competitive ASIC & SoC Prototyping Solution With RTL Synthesis, Partitioning Software, and Best-in-Class Hardware for High-Speed Verification]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 10 Mar 2008 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Opens New Era of ASIC Prototyping with CHIPit Manager Pro]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2008_Feb_5/ai_n24247561]]></link>
		<description><![CDATA[Software Handles Design Implementation Flow from RTL, Reduces Compilation Time Through Parallel Synthesis Process]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 05 Feb 2008 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
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	<item>
		<title><![CDATA[ProDesign Completes ASIC Prototyping Product Portfolio With the New CHIPit QuickSilver]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2008_Jan_24/ai_n24221445]]></link>
		<description><![CDATA[Powerful Virtex 5 FPGA Solution With Innovative System Concept for Highest Scalability Launched at EDS Fair in Japan]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Thu, 24 Jan 2008 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Introduces the CHIPit Platinum V5 and Reaches a New Level in High-End ASIC and SoC Prototyping]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2007_June_4/ai_n19188736]]></link>
		<description><![CDATA[Third Generation of Successful ASIC & SoC Verification System Offers Higher Flexibility, Better Performance and Larger Capacity, Than Ever Before]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 04 Jun 2007 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign to Provide ASIC Prototyping and Verification for Tensilica's Diamond Standard Processors]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_Sept_26/ai_n16837893]]></link>
		<description><![CDATA[SANTA CLARA, Calif. $ MUNICH, Germany -- Tensilica[R], Inc. and ProDesign today announced that SOC (system-on-chip) designers can now use ProDesign's CHIPit ASIC Rapid Prototyping and Emulation systems to verify designs using Tensilica's popular Diamond Standard processor cores. CHIPit verification platforms provide verification and validation through the SOC and ASIC...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 26 Sep 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/tensilica+inc..html"><![CDATA[Tensilica Inc.]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Releases CHIPit Copper Edition at the 43rd DAC; New Member of CHIPit High-Speed ASIC Prototyping Systems Provides Highest Flexibility and Best Price Performance Ratio]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_July_24/ai_n16547069]]></link>
		<description><![CDATA[MUNICH, Germany & SAN FRANCISCO -- ProDesign, leading supplier of high-speed ASIC and SoC verification platforms, today announced the launch of the CHIPit Copper Edition at DAC 2006 (San Francisco, 24-28 July).]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 24 Jul 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Presents New CHIPit ASIC Prototyping Product Family at 43rd DAC]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_July_19/ai_n26929628]]></link>
		<description><![CDATA[MUNICH, Germany & SAN JOSE, Calif. -- ProDesign, leading supplier of high-speed ASIC and SoC verification platforms, will introduce for the first time to the public two new CHIPit platforms -- the CHIPit Iridium Edition and CHIPit Copper Edition -- at booth #3020 during the 43rd Design Automation Conference DAC...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 19 Jul 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Adds Iridium Edition to CHIPit ASIC Prototyping Product Family]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_July_17/ai_n16535359]]></link>
		<description><![CDATA[MUNICH, Germany & SAN JOSE, Calif. -- ProDesign, leading supplier of high-speed ASIC and SoC verification platforms, will announce the launch of the CHIPit Iridium Edition at DAC 2006 (San Francisco, 24-28 July).]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 17 Jul 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/iridium.html"><![CDATA[Iridium]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign among Top 100 Innovative SMEs; Top 100 Project Mentor Lothar Spath Honors High-Tech Producer from Bavaria]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_June_28/ai_n26910012]]></link>
		<description><![CDATA[BRUCKMUHL, Germany -- ProDesign Electronics GmbH has been awarded the "Top 100" quality seal. The quality award is conferred every year as part of a nationwide comparative study of small and mid-sized German companies. The company placed fifth in the "innovative success" category. Dr. Nikolaus Franke of the Vienna University...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 28 Jun 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/small+and+medium+enterprise.html"><![CDATA[small and medium enterprise]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Expands Business in Asia; Global Team Technologies Represents ProDesign in Asia for CHIPit High-Speed ASIC Prototyping Systems]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_May_31/ai_n26880223]]></link>
		<description><![CDATA[MUNICH, Germany & SINGAPORE -- ProDesign, a leading supplier of high-speed ASIC and SoC verification platforms, today announced Global Team Technology as Asian representative for their successful CHIPit line of high-speed ASIC prototyping systems.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Wed, 31 May 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign's CHIPit Supports Transaction Based Verification; CHIPit Prototyping Systems + SCE-MI Standard Interface for Transaction Based Verification Dramatically Accelerates Functional Verification of ASIC Designs]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_May_22/ai_n16374609]]></link>
		<description><![CDATA[BRUCKMUEHL, Germany & SAN JOSE, Calif. -- ProDesign, a leading supplier of ASIC and SoC verification platforms, today announced the availability of a SCE-MI based interface for transaction based verification for its successful CHIPit ASIC prototyping product line.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 22 May 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Announces PCI Express Kit for High-Speed ASIC Prototyping System; New PCI Express Kit Accelerates ASIC Design Verification for PCI Express Development Program]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_April_10/ai_n16120938]]></link>
		<description><![CDATA[MUNICH, Germany & SAN JOSE, Calif. -- ProDesign, leading supplier of high-speed ASIC and SoC verification platforms, today announced the availability of the PCI Express Kit for its ASIC prototyping system.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 10 Apr 2006 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/pci.html"><![CDATA[PCI]]></category>
		<category domain="http://resources.bnet.com/topic/pci+express.html"><![CDATA[PCI Express]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[Verific Licenses HDL Component Software to ProDesign; Verific's HDL Parsers Enable New ASIC Verification Capabilities For ProDesign's CHIPit High-Speed ASIC Prototyping Systems]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_March_28/ai_n26807809]]></link>
		<description><![CDATA[ALAMEDA, Calif. -- Verific Design Automation today said that it has licensed its hardware description language HDL Component Software to ProDesign, a leading supplier of high-speed application specific integrated circuit ASIC and system-on-chip SoC verification platforms.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 28 Mar 2006 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/software.html"><![CDATA[software]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Integrates ASIC & SoC Prototyping Systems with New Novas Siloti Visibility Enhancement Product]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_March_6/ai_n16090671]]></link>
		<description><![CDATA[SAN JOSE, Calif. & MUNICH, Germany -- New Host Controlled Debugging Tool HCD for CHIPit Systems Works with Novas' Siloti SilVE Product to Reduce Verification Time of Complex ICs and SoCs]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 06 Mar 2006 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign CHIPit Platinum V4 Sets Standard for High-Speed Verification; Second Generation of High-End ASIC Prototyping System Based on Latest Virtex 4 FPGA Technology]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2006_Jan_23/ai_n16019592]]></link>
		<description><![CDATA[MUNICH, Germany & SAN JOSE, Calif. -- ProDesign today released the latest version of CHIPitR Platinum featuring an enhanced system architecture based on latest Xilinx Virtex4 FPGA technology, new debugging features and new software for system design implementation.]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 23 Jan 2006 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign's CHIPit Verification System Selected by Micronas for Complex Consumer SoC Designs; Increasing System Sales Validates ProDesign's High-Speed Prototyping Concept]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2005_Dec_19/ai_n15952446]]></link>
		<description><![CDATA[SAN JOSE, Calif. & MUNICH, Germany -- ProDesign, a leading supplier of high-speed ASIC and SoC verification platforms, today announced that it has sold its 150th CHIPit system. Long-term customer Micronas, a semiconductor designer and manufacturer with worldwide operations, will use the newest CHIPit product - the CHIPit Gold Edition...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 19 Dec 2005 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[Prodesign sold in Coachmen restructuring.(Coachmen Industries Inc.)]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_hb5258/is_200510/ai_n20337213]]></link>
		<description><![CDATA[Byline: Rhoda Miel    Coachmen Industries Inc. is selling its Prodesign LLC thermoforming  unit as part of a restructuring effort.    The recreational vehicle and modular-home building company expects  to complete the sale of the Elkhart, Ind.-based Pro  Byline: Rhoda Miel  ...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 31 Oct 2005 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/sales.html"><![CDATA[sales]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign Joins Synopsys in-Sync Program to Enable Unified ASIC Prototyping and Verification; Common ASIC Flow Optimized for Customer Productivity]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2005_April_4/ai_n13501768]]></link>
		<description><![CDATA[SAN JOSE, Calif. -- ProDesign USA, a leading supplier of high-speed FPGA-based ASIC verification platforms, today announced that it has joined the Synopsys in-SyncR program to improve the complete design flow between Synopsys Design CompilerR FPGA DC FPGA Synthesis software, the VCSR comprehensive RTL verification solution and ProDesign CHIPitR ASIC...]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 04 Apr 2005 00:00:00 -0700</pubDate>
		<category domain="http://resources.bnet.com/topic/asic.html"><![CDATA[ASIC]]></category>
		<category domain="http://resources.bnet.com/topic/fpga.html"><![CDATA[FPGA]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ZAiQ Technologies and ProDesign Integrate High Speed Transaction-Based Verification System]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2005_March_14/ai_n12936366]]></link>
		<description><![CDATA[WOBURN, Mass. & SAN JOSE, Calif. -- Versatile CHIPitR ASIC and SoC Verification Systems Offer SCE-MI 1.0 Interface Compatibility, Accelerated Performance and Co-Simulation Support]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Mon, 14 Mar 2005 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
	</item>
	<item>
		<title><![CDATA[ProDesign's CHIPit Gold Edition Pro High Speed ASIC Verification Platform Targets Multimedia Applications]]></title>
		<link><![CDATA[http://findarticles.com/p/articles/mi_m0EIN/is_2005_Feb_22/ai_n9777289]]></link>
		<description><![CDATA[SAN JOSE, Calif. -- 200 MHz System Features Multi-gigabit Serial Links; Embedded  Processors and Memory; DVI, LVDS, USB 2.0 and PCI Express Interfaces]]></description>
		<s:doctype><![CDATA[Research articles]]></s:doctype>
		<pubDate>Tue, 22 Feb 2005 00:00:00 -0800</pubDate>
		<category domain="http://resources.bnet.com/topic/multimedia.html"><![CDATA[multimedia]]></category>
		<category domain="http://resources.bnet.com/topic/prodesign.html"><![CDATA[ProDesign]]></category>
		<category domain="http://resources.bnet.com/topic/.html"><![CDATA[]]></category>
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