Xilinx Inc.

Before joining Tabula, Dennis Segers served as president, CEO and director of Matrix Semiconductor, the pioneer in the design and development of three-dimensional integrated circuits. At Matrix, Dennis oversaw the transition of the company from the early technology feasibility phase to high volume production, culminating in the acquisition of the company by SanDisk in January, 2006. Before Matrix, Dennis served as the senior vice president and general manager of the advanced products group at Xilinx, where he built a multi-billion dollar business. Dennis oversaw the development and introduction of the Virtex family of field-programmable gate arrays (FPGAs), the most successful programmable logic family in the industry's history. In April 2000, he was elected to the Xilinx board of directors. A 30-year industry veteran, Dennis began his career at Mostek Corporation as a product development engineer for Mostek's 16K DRAMs. He held a variety of management positions in circuit design, process technology, and product development in a wide range of IC businesses including memory, logic, and mixed-signal integrated circuits (ICs). In 1988, Dennis co-founded Summit Micro Circuits, a contract-design company for high performance memory. A graduate of Texas A&M University, Dennis is a member of the board of directors of the Fabless Semiconductor Association (FSA), as well as Synplicity, Inc.

Sandeep Vij, vice president of worldwide marketing, is responsible for all aspects of Xilinx worldwide marketing activities across all divisions, products, end markets, partners, channels and geographies. During Vij's tenure, Xilinx has launched some of its most successful products including its Virtex Platform FPGAs, cost optimized Spartan FPGAs, and low power Real Digital CoolRunner CPLDs. To accelerate customer time-to-knowledge and adoption of programmable technology, Vij pioneered the company's innovative mega events including the Terabit Networking Forum, Home Networking Industry Forum, and Programmable World. From 1997-2001, he was vice-president and general manager of the General Products Division at Xilinx where he had profit and loss responsibility for the company's cost-optimized Spartan Series FPGAs. In that capacity, Vij was responsible for all aspects of chip design, product engineering, product planning, manufacturing and fabrication strategy, and business management. Vij joined Xilinx in 1996 as Director of FPGA marketing responsible for all aspects of marketing Xilinx's FPGA products. From 1990-1996, Vij held a variety of marketing positions within Altera Corporation. From 1987-1990, he held engineering positions with GE and is a graduate of their Edison Engineering Program. Vij has an MSEE from Stanford University and a BSEE from San Jose State University.

Robert is VP of Engineering at Banpil. He brings more than 25 years of experience in technology development and management at various semiconductor companies. Most recently, Robert was the VP of Engineering at Lightspeed Semiconductor, responsible for next generation FPGA, state of the art IO with digitally controlled impedance, 1.6Gb/s differential interface for Hyper transport and 3.125 Gb/s SERDES development. Previously, he held key engineering management roles at I-Cube, Xilinx, Sierra, and VLSI. Robert's expertise is in circuit design of both analog and digital, CAD methodology and off chip high-speed interfaces. Robert holds 7 patents in circuit and process technology. He received his MSEE from the University of Minnesota.

Harold Hughes joined Rambus after serving nearly two years on Rambus' Board of Directors. As CEO, Hughes provides the overall vision and operational leadership necessary to drive future growth for the company. Prior to joining Rambus, Mr. Hughes was the Chairman and CEO of Pandesic LLC, an Intel and SAP joint venture. He served as a United States Army Officer before starting his private sector career with Intel Corporation in 1974. Mr. Hughes held a variety of positions during his 23 years at Intel Corporation, including Treasurer, the head of Intel Capital, chief financial officer and the head of Planning and Logistics. Mr. Hughes holds a bachelor’s degree from the University of Wisconsin and an MBA from the University of Michigan.

Joe Jacob has 20 years of hardware product development and management experience in embedded mil/aero and telecom companies. Mr. Jacob received his Bachelor of Science in Electronic and Computer Engineering from George Mason University. Before co-founding Quasar Systems in May 2004, he spent the previous seven years working for Curtiss Wright Controls (formerly Dy4 Systems) in various roles including hardware development manager, technical product manager, and a member of the Technology Innovation Group. Mr. Jacob was responsible for architecting many of the products for the Dy4 DSP Center of Excellence including the CHAMP and StarFabric families of products. He was responsible for representing Dy4 in a variety of industry standards organizations including VITA, PICMG, StarFabric and RapidIO trade associations. Mr. Jacob has authored several articles related to DSP embedded systems, FPGA technology, and switched fabric interconnects. Previous work experience includes a variety of board, Xilinx FPGA and ASIC designs for telecommunications companies such as Alcatel Data Networks, IgT (PMC Sierra), Transtream and PulseCom.

John Johnston is co-founder of August Capital, and previously served as a general partner with two other venture capital firms, Technology Venture Investors (TVI) and Hambrecht & Quist Venture Partners (H&Q). During his venture career, John has invested in more than 25 companies, serving on more than 20 boards of directors. His high-technology venture investments include eShop (Microsoft), Frame Technology, Intuit, Insignia Solutions, Logic Automation (Synopsys), Saros (FileNet), Sybase, Visio and Xilinx.